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LM93 Datasheet(PDF) 31 Page - National Semiconductor (TI) |
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LM93 Datasheet(HTML) 31 Page - National Semiconductor (TI) |
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31 / 92 page ![]() 15.0 Using The LM93 (Continued) Note that since zones 1 and 2 share the same lookup table, both zones must be operating in the same resolution mode. The same applies to zones 3 and 4 since they share the same lookup table. 15.10.3 Zone 1-4 to PWM1-2 Binding Each zone must be bound to the PWM outputs in order to have effect on the output’s duty cycle. Any combination of the zones may be used to drive a PWM output, they are not limited to the binding described in the previous example. For instance zones 1, 2 and 4 may be bound to PWM1 while zones 3 and 4 are bound to PWM2. Note that the duty cycle levels in the lookup table are dependent on the PWM output frequency assignment. Therefore, if PWM1 is assigned to a high frequency and PWM2 is assigned to a low frequency, in the binding example just mentioned, zone 4 has a different duty cycle calculated through the lookup table for PWM1 than for PWM2, even though the same Toffset values are used. This is due to the fact that PWM levels assigned to a high frequency PWM output are different than the levels assigned to a low frequency PWM output. 15.10.4 Fan Control Duty Cycles Several registers in the LM93 use 4-bit values to represent a duty cycle. All of them use a common mapping that associ- ates the 4-bit value with a duty cycle. The 4-bit values correspond also with the 14 steps of the auto fan control algorithm. The mapping is shown below. This applies for PWM outputs running at the default 22.5 kHz (high) fre- quency. 4-Bit Value Step 22.5 kHz (High Frequency) Duty Cycle 0h 0.00% 1h 1 25.00% 2h 2 31.25% 3h 3 37.50% 4h 4 43.75% 5h 5 50.00% 6h 6 56.25% 7h 7 62.50% 8h 8 68.75% 9h 9 75.00% Ah 10 81.25% Bh 11 87.50% Ch 12 93.75% Dh 13 100.00% Eh — Reserved Fh — Reserved 15.10.5 Alternate PWM Frequencies The PWM output can operate at lower frequencies, instead of the default 22.5 kHz. The alternate lower frequencies can be enabled through the PWMx Control 4 registers. When operating in the lower frequency mode, the mapping be- tween step numbers and duty cycles changes. This effects the auto fan control and all LM93 registers that describe a duty cycle using a 4-bit value. The low frequency PWM output duty cycle mapping is listed in the following table: 4-Bit Value Step Low Frequencies Duty Cycle 0h 0% 1h 1 25.00% 2h 2 28.57% 3h 3 32.14% 4h 4 35.71% 5h 5 39.29% 6h 6 42.86% 7h 7 46.43% 8h 8 50.00% 9h 9 53.57% Ah 10 57.14% Bh 11 71.43% Ch 12 85.71% Dh 13 100.00% Eh — Reserved Fh — Reserved 15.10.6 Fan Control Priorities The automatic fan control is not the only function that influ- ences PWM duty cycle. There are several other functions that influence the PWM duty cycle. All the functions can be classified into several categories: Category # Category Name 1 PWM to 100% conditions 2 VRDx_HOT ramp-up/ramp-down 3 PROCHOT ramp-up/ramp-down function 4 Manual PWM Override 5 Fan Spin-Up Control 6 Automatic Fan Control Algorithm The ultimate PWM duty cycle that is chosen can be de- scribed by the following formula: If (Manual PWM Override is active) PWM = max(1,2,3,4) Else PWM = max(1,2,3,5,6) So in general, categories 1, 2 and 3 are always active. In addition to that, either category 4 or categories 5 and 6 are active depending on whether manual override is enabled. In this sense the manual override, when enabled, replaces category 5 and 6. 15.10.7 PWM to 100% Conditions There are several conditions that cause the duty cycles of all PWM outputs to immediately get set to 100%. They are: 1. Any of the four temperature zones has exceeded the programmed Fan Boost Limit setting but has not yet cooled down enough to drop below the hysteresis point. 2. The OVRID bit is set in the LM93 Status/Control. www.national.com 31 |
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