LM93 datasheet(65/92 Pages) NSC

65 / 92 page

16.0 Registers (Continued)

16.8.6 Register C1h

Fan Boost Hysteresis (Zones 3/4)

Address

Read/

Write

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default

Value

C1h

R/W

Fan Boost

Hysteresis

(Zones 3/4)

44h

Bit

Name

R/W

Description

3:0

R/W

Sets the fan boost hysteresis for zone 3

7:4

R/W

Sets the fan boost hysteresis for zone 4

If the temperature zone is above fan boost temperature and then drops below the fan boost temperature, the following occurs:

the PWM output remains at 100% until the temperature goes a certain amount below the fan boost temperature. These hysteresis

registers control this amount and can be set anywhere from 0˚C to 15˚C (unsigned).

16.8.7 Register C2h

Zones 1/2 Spike Smoothing Control

Address

Read/

Write

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default

Value

C2h

R/W

Zones 1/2 Spike

Smoothing

Control

ZN2E

ZN2

ZN1E

ZN1

00h

Bit

Name

R/W

Description

2:0

ZN1

R/W

Configures the spike smoothing characteristics for

zone 1

ZN1E

R/W

When set, the filtered temperature for zone 1 is used

for both limit checking and auto-fan control instead of

the unfiltered temperature. Even when this bit is

cleared, the filtered temperature can be read by

software from the filtered temperature register.

6:4

ZN2

R/W

Configures the spike smoothing characteristics for

zone 2

ZN2E

R/W

When set, the filtered temperature for zone 2 is used

for both limit checking and auto-fan control instead of

the unfiltered temperature. Even when this bit is

cleared, the filtered temperature can be read by

software from the filtered temperature register.

If the REMOTE1 or REMOTE2 pins are connected to a processor or chipset, instantaneous temperature spikes may be sampled

by the LM93. If these spikes are not ignored, the PWM outputs may cause the fans to turn on prematurely and produce

unpleasant noise. Also, false error events may occur. For this reason, any zone that is connected to a chipset or processor may

need spike smoothing enabled. The spike smoothing provides additional filtering above and beyond any

Σ∆ A/D inherent

averaging.

When spike smoothing is enabled, the temperature reading registers still reflect the current value of the temperature — not the

filtered value. Only the filtered temperature registers reflect the filtered value.

ZN1 or ZN2

Spike Smoothed Over

11.8 seconds

7.0 seconds

4.4 seconds

3.0 seconds

1.6 seconds

0.8 seconds

0.6 seconds

0.4 seconds

LM93 Datasheet(PDF) 65 Page - National Semiconductor (TI)

LM93 Datasheet(HTML) 65 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92

Datasheet Download

Link URL