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LM93 Datasheet(PDF) 38 Page - National Semiconductor (TI) |
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LM93 Datasheet(HTML) 38 Page - National Semiconductor (TI) |
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38 / 92 page ![]() 16.0 Registers (Continued) Lock Register Name Address Default Description SETUP REGISTERS x Zone 1 Base Temperature D0h N/D Base temperature to which look-up table offset is applied for Zone 1 x Zone 2 Base Temperature D1h N/D Base temperature to which look-up table offset is applied for Zone 2 x Zone 3 Base Temperature D2h N/D Base temperature to which look-up table offset is applied for Zone 3 x Zone 4 Base Temperature D3h N/D Base temperature to which look-up table offset is applied for Zone 4 x Step 2 Temp Offset D4h N/D Step 2 Zone 1/2 and Zone 3/4 Offset Temperatures x Step 3 Temp Offset D5h N/D Step 3 Zone 1/2 and Zone 3/4 Offset Temperatures x Step 4 Temp Offset D6h N/D Step 4 Zone 1/2 and Zone 3/4 Offset Temperatures x Step 5 Temp Offset D7h N/D Step 5 Zone 1/2 and Zone 3/4 Offset Temperatures x Step 6 Temp Offset D8h N/D Step 6 Zone 1/2 and Zone 3/4 Offset Temperatures x Step 7 Temp Offset D9h N/D Step 7 Zone 1/2 and Zone 3/4 Offset Temperatures x Step 8 Temp Offset DAh N/D Step 8 Zone 1/2 and Zone 3/4 Offset Temperatures x Step 9 Temp Offset DBh N/D Step 9 Zone 1/2 and Zone 3/4 Offset Temperatures x Step 10 Temp Offset DCh N/D Step 10 Zone 1/2 and Zone 3/4 Offset Temperatures x Step 11 Temp Offset DDh N/D Step 11 Zone 1/2 and Zone 3/4 Offset Temperatures x Step 12 Temp Offset DEh N/D Step 12 Zone 1/2 and Zone 3/4 Offset Temperatures x Step 13 Temp Offset DFh N/D Step 13 Zone 1/2 and Zone 3/4 Offset Temperatures x Special Function TACH to PWM Binding E0h 00h Controls the tachometer input to PWM output binding Reserved E1 N/D x LM93 Status/Control E2h 00h Gives Master error status, ASF reset control and Max PWM control x LM93 Configuration E3h 00h Configures various outputs and provides START bit SLEEP STATE CONTROL AND MASK REGISTERS Sleep State Control E4h 03h Used to communicate the system sleep state to the LM93 S1 GPI Mask E5h FFh Sleep state S1 GPI error mask register S1 Fan Mask E6h 0Fh Sleep state S1 fan tach error mask register S3 GPI Mask E7h FFh Sleep state S3 GPI error mask register S3 Fan Mask E8h 0Fh Sleep state S3 fan tach error mask register S3 Temperature/Voltage Mask E9h 07h Sleep state S3 temperature or voltage error mask register S4/5 GPI Mask EAh FFh Sleep state S4/5 GPI error mask register S4/5 Temperature/Voltage Mask EBh 07h Sleep state S4/5 temperature or voltage error mask register OTHER MASK REGISTERS GPI Error Mask ECh FFh Error mask register for GPI faults Miscellaneous Error Mask EDh 3Fh Error mask register for VRDx_HOT, SCSI_TERMx, and dynamic Vccp limit checking. ZONE 1 AND 2 TEMPERATURE READING OFFSET REGISTERS x Special Function Zone 1 Adjustment Offset EEh 00h Allows all Zone 1 temperature measurements to be adjusted by a programmable offset x Special Function Zone 2 Adjustment Offset EFh 00h Allows all Zone 2 temperature measurements to be adjusted by a programmable offset www.national.com 38 |
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