LM93 datasheet(46/92 Pages) NSC

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16.0 Registers (Continued)

16.5.2 Register 49h

H_Error Status 2

Address

Read/

Write

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default

Value

49h

RWC

H_Error

Status 2

ADIN8

_ERR

ADIN7

_ERR

ADIN6

_ERR

ADIN5

_ERR

ADIN4

_ERR

ADIN3

_ERR

ADIN2

_ERR

ADIN1

_ERR

00h

Bit

Name

R/W

Description

Sleep

Masking

AD1_ERR

RWC This bit is set when the AD_IN1 voltage has fallen outside the range defined

by the AD_IN1 Low Limit and the AD_IN1 High Limit registers.

S3, S4/5

AD2_ERR

RWC This bit is set when the AD_IN2 voltage has fallen outside the range defined

by the AD_IN2 Low Limit and the AD_IN2 High Limit registers.

S3, S4/5

AD3_ERR

RWC This bit is set when the AD_IN3 voltage has fallen outside the range defined

by the AD_IN3 Low Limit and the AD_IN3 High Limit registers.

S3, S4/5

AD4_ERR

RWC This bit is set when the AD_IN4 voltage has fallen outside the range defined

by the AD_IN4 Low Limit and the AD_IN4 High Limit registers.

S3, S4/5

AD5_ERR

RWC This bit is set when the AD_IN5 voltage has fallen outside the range defined

by the AD_IN5 Low Limit and the AD_IN5 High Limit registers.

S3, S4/5

AD6_ERR

RWC This bit is set when the AD_IN6 voltage has fallen outside the range defined

by the AD_IN6 Low Limit and the AD_IN6 High Limit registers.

S3, S4/5

AD7_ERR

RWC This bit is set when the AD_IN7 voltage has fallen outside the range defined

by the AD_IN7 Low Limit and the AD_IN7 High Limit registers.

S3, S4/5

AD8_ERR

RWC This bit is set when the AD_IN8 voltage has fallen outside the range defined

by the AD_IN8 Low Limit and the AD_IN8 High Limit registers.

S3, S4/5

LM93 Datasheet(PDF) 46 Page - National Semiconductor (TI)

LM93 Datasheet(HTML) 46 Page - National Semiconductor (TI)

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