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PC87591L Datasheet(PDF) 337 Page - National Semiconductor (TI) |
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PC87591L Datasheet(HTML) 337 Page - National Semiconductor (TI) |
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337 / 437 page ![]() 6.0 Host-Controlled Modules and Host Interface (Continued) Revision 1.07 337 www.national.com Figure 109. Structure of Standard Configuration Register File Table 48. Logical Device Number (LDN) Assignments Write accesses to unimplemented registers (i.e., accessing the Data register while the Index register points to a non-existing register) are ignored; reads return 0016 for all addresses except 7416 and 7516 (DMA configuration registers), which return 0416 (indicating that no DMA channel is active). The configuration registers are accessible immediately after Host Domain reset. Standard Logical Device Configuration Register Definitions In the registers below, any undefined bit is reserved. Unless otherwise noted, the following definitions also hold true: ● All registers are read/write. ● All reserved bits return 0 on reads except where noted. To prevent unpredictable results, do not modify these bits. Use read-modify-write to prevent the values of reserved bits from being changed during write. ● Write-only registers should not use read-modify-write during updates. LDN Functional Block 0416 Mobile System Wake-Up Control (MSWC) 0516 Keyboard and Mouse Controller (KBC) - Mouse Interface 0616 Keyboard and Mouse Controller (KBC) - Keyboard Interface 0F16 Shared BIOS and Security 1016 Real Time Clock 1116 Power Management I/F Channel 1 1216 Power Management I/F Channel 2 0716 2016 3016 6016 7516 FE16 Logical Device Number Register SuperI/O Configuration Registers Logical Device Control Register Standard Logical Device Special (Vendor-Defined) Configuration Registers Banks 2F16 F016 Bank Select 6316 7416 7016 7116 Configuration Registers (One per Logical Device) Logical Device |
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