PC87591L datasheet(139/437 Pages) NSC

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Embedded Controller Modules (Continued)

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Timer/counter 1 (TnCNT1) counts down at the rate of the selected clock (see “Counter Clock Source Select” on page 136

for additional details). On underflow, TnCNT1 is reloaded from TnCRA register and counting proceeds. If enabled, the TAn

pin toggles on underflow of TnCNT1. Software can select the initial value of TAn output as either high or low (see “Timer I/O

Functions” on page 141 for additional details). In addition, the TnAPND interrupt pending flag is set, and a timer interrupt 1

is generated if TnAIEN bit is set to 1 (see Section 4.7.4 on page 140 for detailed information). Since TAn toggles on every

underflow, a 50% duty cycle PWM signal can be generated on TAn without requiring interaction by the core.

Timer/counter 2 (TnCNT2) counts down at the rate of the selected clock (see “Counter Clock Source Select” on page 136

additional details). On every underflow of TnCNT2, the value contained in TnCRB register is loaded into TnCNT2, and count-

ing proceeds downwards from that value. In addition, the TnDPND interrupt pending flag is set, and a timer interrupt 2 is

generated if TnDIEN bit is set to 1. See Section 4.7.4 on page 140 for detailed information.

Mode 4, Input Capture and Timer

It is also possible to operate in a mode that offers a combination of a single timer, with automatic reload, and a single capture

timer. In this mode, TnCNT1 operates as a PWM-timer that is reloaded from TnCRA on underflow while TnCNT2 forms the

time base of the capture timer. The value on TnCNT2 is transferred to TnCRB when a valid event on TBn is detected. It is

possible to toggle TA on every underflow of TnCNT1 and thus generate a 50% duty cycle PWM signal on TAn.

This mode is a combination of modes 3 and 2. It allows timer/counter 2 to operate as a single-input capture timer concur-

rently with timer/counter 1. (Timer/counter 2 can be used as a system timer as described in mode 3.) Figure 50 shows a

block diagram of the timer in mode 4.

TnCNT1 starts counting down once a clock has been enabled. On underflow, TnCNT1 is reloaded from TnCRA register, and

counting proceeds downwards from that value. If enabled, the TAn pin toggles on every underflow of TnCNT1. Software can

select the initial value of TAn output signal as either high or low (see Section 4.7.5 on page 141 for additional details). In

addition, the TnAPND interrupt pending flag is set, and a timer interrupt 1 is generated if TnAIEN bit is set to 1 (see

Section 4.7.4 on page 140 for detailed information). Since TAn toggles on every underflow, a 50% duty cycle PWM signal

can be generated on TAn without requiring any interaction of software (and therefore the core).

TnCNT2 starts counting down once a clock has been enabled. When a transition is received on TBn, the value contained in

TnCNT2 is transferred to TnCRB, and the interrupt pending flag, TnBPND, is set. A timer interrupt 2 is generated if it is en-

abled. A preset of the counter to FFFF16 on detection of a transition on TBn can be enabled. In this case, the current value

of TnCNT2 is transferred to TnCRB, followed by a preset of the counter to FFFF16. TnCNT2 starts counting downwards from

FFFF16 until the next transition is received on TBn, which causes the procedure of capture and preset to be repeated. Un-

derflow of TnCNT2 sets the TnDPND interrupt pending flag and can also generate a timer interrupt 2 if the interrupt was

enabled (see Section 4.7.4 on page 140 for detailed information.). The input signal on TBn must have a pulse width equal

to or greater than one system clock cycle (see Section 7.6.10 on page 399 for additional details). TBn can be configured to

sense either rising or negative edge transitions.

Reload A

Timer/Counter 1

Reload B

Timer 1

Clock

TAIEN

TAPND

TnCNT1

TnCRA

TnCRB

TDIEN

TDPND

Timer

Interrupt 1

Timer

Interrupt 2

TAEN

Timer/Counter 2

TnCNT2

Timer 2

Clock

TBn

Clock

Selector

Underflow

Figure 49. Mode 3, Dual Independent Timer

PC87591L Datasheet(PDF) 139 Page - National Semiconductor (TI)

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