ML7344CE datasheet(153/154 Pages) LAPIS

153 / 154 page

FEDL7344C/E/J-05

ML7344C/E/J

153/154

Page

Document

No.

Date

Edition

Current

Edition

Description

Removed SPXO support

Removed Master Clock Accuracy(ACMCK2)

Corrected Regulator voltage output when sleep

mode(SUB_REG)

Corrected Typ. value of TX Power.

Corrected typ. value of blocking (470MHz

BAND).

Corrected compensation range of AFC

198

Removed a register [IFF_ADJ_H: B0 0x5E]

198

Removed a register [IFF_ADJ_L: B0 0x5F]

FEDL7344C/E/J-04

Oct 2, 2014

216

215

Removed registers bit6-4 of [AFC_CTRL: B1 0x15]

Added description of EXT_CLK pin

Changed frequency from 32.768kHz to 44kHz in the

example.

89-90

Added antenna switching function.

Modified registers

135

138

Corrected TX-RX transition time in Timing chart

136

139

Corrected RX start-up time in Timing chart

139

142

Corrected RX start-up time and CCA time in Timing

chart

176

179

Added note of RCOSC_MODE[SLEEP/WU_SET:

B0 0x2D(3)]

177

180

Added note of

WUDT_CLK_SET[WUT_CLK_SET: B0

0x2E(7-4)]

195

added [2DIV_CTRL: B0 0x48] and [ANT_CTRL:

B0 0x4C]

FEDL7344C/E/J-05

Jan 20, 2015

234

238

added equation for setting value and note of

[DEMOD_SET6: B1 0x5C]

ML7344CE Datasheet(PDF) 153 Page - LAPIS Semiconductor Co., Ltd.

ML7344CE Datasheet(HTML) 153 Page - LAPIS Semiconductor Co., Ltd.

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