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ML7396AB Datasheet(PDF) 76 Page - LAPIS Semiconductor Co., Ltd. |
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ML7396AB Datasheet(HTML) 76 Page - LAPIS Semiconductor Co., Ltd. |
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76 / 140 page ![]() FEDL7396A/B/E-07 ML7396A/B/E 76/140 ●Programming GFSK modulation By setting GFSK_EN ([DATA_SET;B0 0x47(4)]) =0b1, GFSK modulation can be selected. Programming GFSK frequency deviation In GFSK modulation, frequency deviation can be set by [F_DEV_L:B0 0x4E] and [F_DEV_H:B0 0x4F] registers. Frequency deviation setting value can be calculated using the following formula. F_DEV = {fDEV / fREF} * 2 20 (Integer part) [note: using 20bit circuit] Here F_DEV : Frequency deviation setting fDEV : Frequency deviation [MHz] fREF : PLL reference frequency (input clock=36MHz) [Example] When set frequency deviation is 50 kHz at 100kbps, the calculation are as follow. (fREF = 36MHz) F_DEV = {0.05MHz / 36MHz} * 220 (Integer part) = 1456 (0x05B0) Therefore [F_DEV_L:B0 0x4E] = 0xB0 [CH_SPACE_H:B0 0x4D] = 0x05 Following table shows frequency deviation value with modulation index (m) =1 for each data rate. Data rate Register 50kbps 100kbps 150kbps 200kbps [F_DEV_L:B0 0x4E] 0xD8 0xB0 0x44 0x60 [F_DEV_H:B0 0x4F] 0x02 0x05 0x04 0x0B Note: For 10kbps, 20kbps, 40kbps setting, please refer to the "Initial register setting" file. |
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