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ML7396AB Datasheet(PDF) 51 Page - LAPIS Semiconductor Co., Ltd. |
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ML7396AB Datasheet(HTML) 51 Page - LAPIS Semiconductor Co., Ltd. |
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51 / 140 page ![]() FEDL7396A/B/E-07 ML7396A/B/E 51/140 IDLE detection for long period When CCA IDLE detection is performed for longer time period, IDLE_WAIT[9:0]([IDLE_WAIT_L/H:B0 0x17/18(1-0)] can be used. By setting IDLE_WAIT [9:0], averaging period longer than the period (for example, AD conversion16μs, 8 times average setting 128μs) can be possible. This function can be used for IDLE determination – by counting times when average ED value becomes smaller than CCA threshold defined by [CCA_LEVEL: B0 0x13] register. When counting exceed IDLE_WAIT [9:0], IDLE is determined. If average ED value exceeds CCA threshold level, imemediately “Busy” is determined without wait for IDLE_WAIT [9:0] period. The following timing chart is IDLE detection setting IDLE_WAIT[9:0]. [ED value 8 timesv average IDLE detection case] [Condition] CCA normal mode ADC_CK_SEL ([ADC_CLK_SET: B0 0x08(4)])=0b1 (2MHz) ED_AVG[2:0] ([ED_CTRL: B0 0x1B(2-0)])=0b011 (ED value 8 times average) IDLE_WAIT[9:0] ([IDLE_WAIT_L/H: B0 0x17/18(1-0)])=0b00_0000_0011 (IDLE detection period 48μs) CCA_EN [Note] 1. After issuing CCA command, transit into no-input state, and exit this state after filter stbilization. 2. When the iput level chnge from no-input to -80dBm, it takes around 32 μs for indicating -80dBm ED value. ED value (Internal signal) CCA_RSLT[1:0] [CCA_CNTRL: B0 0x15(1-0)] CCA_DONE [CCA_CNTRL: B0 0x15(2)] [CCA_CNTRL: B0 0x15(4)] ED_VALUE[7:0] [ED_RSLT: B0 0x16] ED value averaging period (128μs) 0b10 (CCA on-going) ED1 ED8 ED2 ED7 ED9 ED10 ED11 Filter stabilization 16 to 32 μs AD conversion (16μs) IDLE detection period ED (0-7) 0b00 (IDLE) INVALID averaging CCA execution period (Max.32μs+128μs+48μs=208μs) 0x001 0x000 0x002 0x003 (48μs) < CCA_TH_LV B0 0x13 ED0 ●●● ED ED ED (1-8) (2-9) (3-10) IDLE_WAIT[9:0] [IDLE_WAIT_L/H:B0 0x17/18] IDLE_WAIT start (average ED value < CCA_TH_LV) continue for AD conversion period 3 times (48μs), then IDLE is determined. |
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