ML7396AB datasheet(84/140 Pages) LAPIS

84 / 140 page

FEDL7396A/B/E-07

ML7396A/B/E

84/140

VCO calibration is necessary every 0.9ms to 4.2ms.

After completion, capacitance compensation values are stored in the following registers.

Capacitance compensation value at lower limit frequency: [VCO_CAL_MIN:B1 0x1A]

Capacitance compensation value at upper limit frequency: [VCO_CAL_MAX:B1 0x1B]

In actual operation, based on the 2 compensation values, the most optimized capacitance value for the frequency is calculated

and applied. The calculated value is stored in [VCO_CAL:B1 0x1C] register.

By evaluation stage, if below values are stored in the MCU memory and uses these values upon reset or power-up, calibration

operation can be omitted.

Registers to be saved in the MCU memory.

[VCO_CAL_MIN_FL:B1 0x16]

[VCO_CAL_MIN_FM:B1 0x17]

[VCO_CAL_MIN_FH:B1 0x18]

[VCO_CAL_MAX_N:B1 0x19]

[VCO_CAL_MIN:B1 0x1A]

[VCO_CAL_MAX: B1 0x1B]

NOTE:

For lower limit frequency, please use frequency at least 2MHz lower than operation frequency

For upper limit frequency should be selected so that operation frequency is in the frequency range.

Frequency range should not include 36MHz multiplied frequency, i.e. 900MHz, 936MHz.

In case of like a channel change, if the setting frequency is outside of calibration frequency range, calibration process

has to be performed again with proper frequency.

●VCO lower limit frequency setting

As described in the “Programing Channel #0 Frequency”, VCO lower limit frequency can be set by setting F-counter

parameter into [VCO_CAL_MIN_FL:B1 0x16], [VCO_CAL_MIN_FM:B1 0x17] and [VCO_CAL_MIN_FH:B1 0x18]

registers. N-counter and A-counter parametrs are applied the valu stored in [CH0_NA:B0 0x4B] register.

Lower limit frequency setting value can be calculated using the following formula.

LOW_F = {FLOW – (4 * N + A) * fREF} / fREF * 2

20 (Integer part)

[note: using 20bit circuit]

Here

LOW_F

: Lower limit frequency F-counter setting

FLOW

: Lower limit frequency [MHz]

fREF

: PLL reference frequency (input clock=36MHz)

: N-counter parameter

: A-counter parameter

If operation low limit frequency is 923.1MHz, N= 6 and A=1. Setting value should be lower than 2MHz. Then in following

example, lower limit frequency is set to 921.1MHz. (fREF = 36MHz)

LOW_F = {921.1 – (4 * 6 + 1) * 36MHz} /36MHz * 220 (Integer part) = 614582 (0x960B6)

Setting values for each register is as follows:

[VCO_CAL_MIN_FL:B1 0x16]= 0xB6

[VCO_CAL_MIN_FM:B1 0x17]= 0x60

[VCO_CAL_MIN_FL:B1 0x18]= 0x09

ML7396AB Datasheet(PDF) 84 Page - LAPIS Semiconductor Co., Ltd.

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