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ML7396AB Datasheet(PDF) 39 Page - LAPIS Semiconductor Co., Ltd. |
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ML7396AB Datasheet(HTML) 39 Page - LAPIS Semiconductor Co., Ltd. |
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39 / 140 page  FEDL7396A/B/E-07 ML7396A/B/E 39/140 Antenna switching function By using [2DIV_CTRL: B0 0x71], [RF_CTRL_SET: B0 0x75] registers, ML7396 can support both SPDT and DPDT antena swith control. ANT_SW pin (#20) and TRX_SW pin ( #21) output considion for each antenna switch are explained below. DPDT switch Set 2PORT_SW([2DIV_CTRL:B0 0x71(1)])=0b1, ANT_CTRL1([2DIV_CTRL: B0 0x71(5)])=0b0. ANT_SW, TRX_SW output condition of each Idle, TX, RX state are as follow. (default setting) If INV_TRX_SW([2DIV_CTRL:B0 0x71(2)])=0b1, polarity of ANT_SW pin (#20) and TRX_SW pin (#21) are reversed. INV_TRX_SW=0b0 (default setting) INV_TRX_SW=0b1 (reversed polarity) TX/RX state ANT_SW TRX_SW ANT_SW TRX_SW Description Idle H L L H Idle state TX L H H L TX state H L L H When Diversity disable or initial condition when diversity enable is set ([2DIV_CTRL: B0 0x71(0)]=0b1). RX L/H H/L H/L L/H If diversity enable is set, during searching, (ANT_SW=H, TRX_SW=L) and (ANT_SW=L, TRX_SW=H) are switched alternatively. After diversity completion, fix to one of the condition. SPDT switch Set 2PORT_SW([2DIV_CTRL:B0 0x71(1)])=0b0, ANT_CTRL1([2DIV_CTRL: B0 0x71(5)])=0b0. ANT_SW, TRX_SW output condition of each Idle, TX, RX state are as follow. (default setting) If INV_TRX_SW([2DIV_CTRL: B0 0x71(2)])=0b1, polarity of TRX_SW pin (#21) is reversed. INV_TRX_SW=0b0 (default setting) INV_TRX_SW=0b1 (polarity reverse) TX/RX condition ANT_SW TRX_SW ANT_SW TRX_SW Description Idle L L L H Idel state TX L H L L TX state L L L H When diversity disable or initial condition when diversity enable is set ([2DIV_CTRL: B0 0x71(0)]=0b1). RX H/L L H/L H If diversity enable is set,during searching (TRX_SW=H) and (TRX_SW=L) is switched alternatively. After diversity completion , fix to one of the condition. |
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