ML7396AB datasheet(99/140 Pages) LAPIS

Part #	ML7396AB

Description	Sub GHz band short range wireless transceiver IC

PDF	140 Pages

Scroll/Zoom	100%

Manufacturer	LAPIS [LAPIS Semiconductor Co., Ltd.]

Direct Link	http://www.lapis-semi.com/

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99 / 140 page

FEDL7396A/B/E-07

ML7396A/B/E

99/140

●RX mode (Packet mode, packet length ≥ 257 bytes)

The host MCU should read RX data from a FIFO while checking FIFO-Full interrupt (INT[05] group1) and FIFO-Empty

interrupt (INT[04] group1) in order to avoid FIFO-Overrun or FIFO-Underrun. Other operation are same as packet mode (less

than 256byte).

START

RX_ON issue

[RF_STATUS:B0 0x6C]

Yes

FIFO-Full (INT[05])?

[INT_SOURCE_GRP1:B0 0x24]

Clear INT[05]

[INT_SOURCE_GRP1 B0 0x24]

Read RX data from FIFO

[RD_RX_FIFO:B0 0x7F]

ACK request?

Yes

RX completion (INT[18]/[19])?

[INT_SOURCE_GRP3:B0 0x26]

Gp to Ack TX mode flowchart

Yes

Go to CRC error flowchart

in “Error process”

CRC error (INT[20]/INT[21])?

[INT_SOURCE_GRP3:B0 0x26]

Read RX data from FIFO

[RD_RX_FIFO:B0 0x7F]

Clear interrupts

INT[18],[20] or INT[19].[21]

[INT_SOURCE_GRP3:B0 0x26]

Next packet RX?

Yes

TX?

Go to TX flowchart

END

TRX_OFF issue

[RF_STATUS:B0 0x6C]

ML7396AB Datasheet(PDF) 99 Page - LAPIS Semiconductor Co., Ltd.