ML7396AB datasheet(101/140 Pages) LAPIS

101 / 140 page

FEDL7396A/B/E-07

ML7396A/B/E

101/140

●ACK TX mode (AUTO_ACK, packet length ≤ 256 bytes)

When AUTO_ACK function is enabled by AUTO_ACK_EN ([AUTO_ACK_SET:B0 0x55(4)]) =0b1, if receiving TX packet

with ACK request, preparing TX Ack packet (TX_ON) or transmitting Ack packet automatically (when using Ack timer).

START

Set AUTO_ACK_EN=0b1

[AUTO_ACK_SET:B0 0x55(4)]

Address match?

RX_ON issue

[RF_STATUS:B0 0x6C]

Yes

From RX flowchart

(≤256 byte)

PHY reset issue

Read pending data

Yes

[RST_SET:B0 0x01]

RX completion (INT[18]/[19])?

[INT_SOURCE_GRP3:B0 0x26]

CRC error (INT[20]/INT[21])?

[INT_SOURCE_GRP3:B0 0x26]

Yes

Read RX data from FIFO

[RD_RX_FIFO:B0 0x7F]

Clear INT[20] or [21]

[INT_SOURCE_GRP3:B0 0x26]

PHY reset issue

[RST_SET:B0 0x01]

Set ACK_STOP=0b1

[AUTO_ACK_SET:B0 0x55(0)]

Set ACK_STOP=0b0

[AUTO_ACK_SET:B0 0x55(0)]

END

(*1)

Set ACK_STOP=0b1

[AUTO_ACK_SET:B0 0x55(0)]

When CCA_AUTO_EN=0b1,

([CCA_CNTRL:B0 0x15(7)])

executing CCA automatically.

(*1)

Set ACK_STOP=0b0

[AUTO_ACK_SET:B0 0x55(0)]

Ack frame setting

END

[ACK_FRAME1:B0 0x53]

[ACK_FRAME2:B0 0x54]

Auto Ack ready (INT[24])?

[INT_SOURCE_GRP4:B0 0x27]

Yes

When using Ack timer, no need

to set ACK_SEND bit.

Set ACK_SEND=0b1

[AUTO_ACK_SET:B0 0x55(1)]

TX completion?

(INT[16]/[17])

[INT_SOURCE_GRP3:B0 0x26]

Yes

Clear interrupts

INT[16],[22] or INT[17].[23]

[INT_SOURCE_GRP3:B0 0x26]

Set ACK_STOP=0b1

[AUTO_ACK_SET:B0 0x55(0)]

(*1)

Only when data rate is 50kbps and SCLK speed is

16MHz (max), please set 12μs wait between

ACK_STOP=0b1 to ACK_STOP=0b0.

Set ACK_STOP=0b0

[AUTO_ACK_SET:B0 0x55(0)]

END

ML7396AB Datasheet(PDF) 101 Page - LAPIS Semiconductor Co., Ltd.

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