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ML7396AB Datasheet(PDF) 113 Page - LAPIS Semiconductor Co., Ltd.

Part # ML7396AB
Description  Sub GHz band short range wireless transceiver IC
PDF  140 Pages
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Manufacturer  LAPIS [LAPIS Semiconductor Co., Ltd.]
Direct Link  http://www.lapis-semi.com/
Logo LAPIS - LAPIS Semiconductor Co., Ltd.

ML7396AB Datasheet(HTML) 113 Page - LAPIS Semiconductor Co., Ltd.

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FEDL7396A/B/E-07
ML7396A/B/E
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●2 diversity operation
After setting 2DIV_EN ([2DIV_CNTRL: B0 0x71(0)])=0b1, issuing RX_ON by [RF_STATUS:B0 0x6C] register. Antennas
are switched to acquire each ED value, the antenna with higher ED value will be automatically selected.
ML7396 supports recovering function from incorrect diversity completion caused by errornous detection due to thermal noize,
After dicersity search completion, if preamble can not be detected until antenna search timer expiration, ML7396 judges the
previous diversity search completion is incorrect and resume diversity operation automatically.
When resume diversity operation for next packet receiving, please clear RX completion interrupt (INT[18]/[19] group3) and
Diversity search completion interrupt (INT[09] group2). For details, please refer to “Diversity function”.
ED values ([ANT1_ED:B0 0x73], [ANT2_ED:B0 0x74] registers) from diversityantennas and the diversity result
([2DIV_RSLT:B0 0x72(1-0)]) will be cleard when clearing Diversity search completion interrpy, clearing RX completion or
Diversity resume by errornous detection. ED values and diversity result should be read before clearing RX completion
interrupt.
START
Set 2DIV_EN=0b1
[2DIV_CNTRL:B0 0x71(0)]
Masking INT[09]
[INT EN GRP2:B0 0x2B ]
* If set 2DIV_EN=0b1 after issuing RX_ON, diversity
will be executed after search timer completion defined
by [2DIV_SEARCH:B0 0x6F] register.
RX_ON issue
If SFD is detected while seatch timer counting,
diversity will not be executed and keep receiving.
[RF_STATUS:B0 0x6C]
No
RX completion (INT[18]/[19])?
[INT_SOURCE_GRP3:B0 0x26]
Yes
Read diversity result
[2DIV_RSLT:B0 0x72(1-0)]
[ANT1_ED:B0 0x73]
[ANT2_ED:B0 0x74]
Clear INT[18] or [19]
[INT_SOURCE_GRP3:B0 0x26]
Clear INT[09]
[INT_SOURCE_GRP2:B0 0x25]
Yes
* Diversity search completion interrupt (INT[09]
group2) should be cleard at same timing of RX
completion interrupt clearance.
Next packet RX?
No
TRX_OFF issue
[RF_STATUS:B0 0x6C]
END



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