ML7396AB datasheet(130/140 Pages) LAPIS

130 / 140 page

FEDL7396A/B/E-07

ML7396A/B/E

130/140

■About FCC Support

ML7396A (915MHz band) complies with FCC PART 15. When the outputpowe is -1dBm or less, PART 15.249 is applied, and

when the output power is +30dBm or less, PART 15.247 is applied. Spurious emissions should comply with PART 15.209.

PART 15.247 requires the frequency hopping or the wideband digital modulation. For details of the frequency hopping, please

refer to the "About frequency hopping" below. For details of the wideband digital modulation, please refer to the " Initial register

setting " file.

●About frequency hopping (FHSS: Frequency Hopping Spread Spectrum)

According to the FCC (United States radio act) Part 15.247, the FHSS system which 20dB bandwidth is less than 250 kHz,

should have 50 or more hopping channels. If 20dB bandwidth is 250 kHz or more, 25 or more hopping channels should be

supported. And the channel occupation time should be limited to 400ms at a maximum.

The following examples show how to control and set registers in order to comply with above regulations.

For details of register settings, please refer to the "Initial registers setting" file.

• Frequency switch flow during TX

(0) TX completion (TX_ON)

(1) Transition to TRX_OFF or RX_ON state by SET_TRX[3:0] ([RF_STATUS:B0 0x6C(3-0)]).

(2) Switching frequency by [CH0_FL:B0 0x48], [CH0_FM:B0 0x49] and [CH0_FH:B0 0x4A] registers.

(3) Issuing TX_ON command by SET_TRX[3:0].

Repeat (0) to (3).

• Frequency switch flow during RX

(0) RX completion (RX_ON)

(1) Masking PLL unlock interrupt by INT_EN[25] ([INT_EN_GRP4:B0 0x2D(1)]) =0b0.

(2) Switching frequency by [CH0_FL:B0 0x48], [CH0_FM:B0 0x49] and [CH0_FH:B0 0x4A] registers.

(3) Wait 100μs. (PLL lock period)

(4) Clear the PLL unlock interrupt (INT[25] group4), and enable the interrupt by INT_EN[25] =0b1

(5) Receive data

Repeat (0) to (5).

* PLL unlock interrupt may be detected during frequency switch.

It is recommended to masking the PLL unlock interrupt for 100μs during frequency switch as shown in (1) to (4).

The following examples show how to control the frequency hopping system.

•Control example 1. TX equipment transmits a long term preamble, and the RX equipment scans channels to detect a preamble

TX equipment hops the frequency according to the hopping pattern. And the channel occupation time should be less than 400ms

to comply with the regulation.

RX equipment does not know the using channel transmitting preamble, and so scans all channels for detecting preamble. The

preamble transmitting period should be longer than the channel scan period on the RX equipment. For details of the channel scan

flow, please refer to the flow chart shown later.

The one channel scan time can be calculated as "preamble search period (36bits / data rate) + PLL lock period (100μs)".

The following table shows the channel scan period for each data rate. Please set an appropriate preamble length according to the

following table. The preamble length can be set by [TX_PR_LEN:B0 0x42] register. (max. 255 bytes)

ML7396AB Datasheet(PDF) 130 Page - LAPIS Semiconductor Co., Ltd.