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DS2155 Datasheet(PDF) 135 Page - Dallas Semiconductor |
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DS2155 Datasheet(HTML) 135 Page - Dallas Semiconductor |
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135 / 262 page  DS2156 135 of 262 Register Name: H1RC, H2RC Register Description: HDLC #1 Receive Control HDLC #2 Receive Control Register Address: 31h, 32h Bit # 7 6 5 4 3 2 1 0 Name RHR RHMS — — — — — RSFD Default 0 0 0 0 0 0 0 0 Bit 0/Receive SS7 Fill-In Signal Unit Delete (RSFD) 0 = normal operation; all FISUs are stored in the receive FIFO and reported to the host. 1 = When a consecutive FISU having the same BSN the previous FISU is detected, it is deleted without host intervention. Bits 1 to 5/Unused, must be set to 0 or proper operation Bit 6/Receive HDLC Mapping Select (RHMS) 0 = receive HDLC assigned to channels 1 = receive HDLC assigned to FDL (T1 mode), Sa bits (E1 mode) Bit 7/Receive HDLC Reset (RHR). Resets the receive HDLC controller and flushes the receive FIFO. Must be cleared and set again for a subsequent reset. 0 = normal operation 1 = reset receive HDLC controller and flush the receive FIFO |
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