SI3021 datasheet(19/54 Pages) ETC

19 / 54 page

Si3035

Rev. 1.2

delay, a higher Fs may be established prior to executing

the off-hook, such as an Fs of 10.286 kHz. The delay

allows line transients to settle prior to normal use.

Ring Detect

The ring signal enters the Si3035 through low value

capacitors connected to TIP and RING. RGDT is a

clipped, half-wave rectified version of the ringing

waveform. See Figure 18 for a timing diagram of the

RGDT pin.

The integrated ring detect of the Si3035 allows the

device to present the ring signal to the DSP, through the

serial port, with no additional signaling required. The

signal sent to the DSP is a clipped version of the original

ring signal. In addition, the Si3035 passes through the

caller ID data unaltered.

The system can also detect an occurring ring by the

status of the RDT bit of Register 5. This bit is a

read-only bit that is set when the line-side device

detects a ring signal at RNG1 and RNG2. The RDT bit

clears when the system either goes off-hook or 4.5 to 9

seconds after the last ring is detected.

If caller ID is supported in the system, the designer can

enable the Si3035 to pass this information to the SDO

output. Following the completion of the first ring, the

system should set the ONHM bit (Register 5, bit 3). This

bit must be cleared at the conclusion of the receipt of

the caller ID data and prior to the next ring burst.

The Si3021 can support a wake-up-on-ring function

using the RGDT signal. Refer to "Power Management"

on page 24 for more details

Improved JATE Support

The HYBD pin connects to a node on the internal hybrid

cancellation circuit providing a pin for a balancing

capacitor, C12. C23 adds the necessary transmit

out-of-band filtering required to meet JATE out-of-band

noise specifications. The addition of C23 alters the

transmit path frequency response which must be

balanced with capacitor C12 to obtain maximum hybrid

cancellation.

Products using the Si3035 which have been submitted

for JATE approval should document a waiver for the

JATE DC Termination specification. This specification is

met in the Si3034 global DAA device.

Digital Interface

The Si3035 has two serial interface modes that support

most standard modem DSPs. The M0 and M1 mode

pins select the interface mode. The key difference

between these two serial modes is the operation of the

FSYNC signal. Table 16 summarizes the serial mode

definitions.

Figure 18. Ring Detect Timing

Table 16. Serial Modes

Mode

M1 M0

Description

0 0

FSYNC frames data

0 1

FSYNC pulse starts data frame

1 0

Slave mode

1 1

Reserved

DATA

DIGITIZED LINE SIGNAL

SDO

RNG1/

RNG2

First Ring

0.2–3.0 seconds

0.5–1.5 Sec.

> 0.2 Sec.

RGDT

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