PM6341 datasheet(55/272 Pages) PMC

55 / 272 page

PM6341 E1XC

DATA SHEET

PMC-910419

ISSUE 8

E1 FRAMER/TRANSCEIVER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

FUNCTIONAL DESCRIPTION

9.1

Digital Receive Interface (DRIF)

The Digital Receive Interface provides control over the various input options

available on the multifunctional digital receive pins RDP/RDD/SDP and

RDN/RLCV/SDN. When configured for dual-rail input, the multifunctional pins

become the RDP and RDN inputs. These inputs can be enabled to receive either

return-to-zero (RZ) or non-return-to-zero (NRZ) signals; the NRZ input signals

can be sampled on either the rising or falling edge of RCLKI. When the interface

is configured for single-rail input, the multifunctional pins become the RDD and

RLCV inputs, which can be sampled on either the rising or falling RCLKI edge.

Finally, when the analog interface is used, the multifunction pins become the

SDP and SDN outputs, indicating the sliced pulses corresponding to the received

positive and negative analog line pulses.

9.2

Analog Pulse Slicer (RSLC)

The Analog E1 Pulse Slicer function is provided by the RSLC block. The Receive

Data Slicer (RSLC) block provides the first stage of signal conditioning for a

G.703 2048 kbit/s serial data stream by converting bipolar line signals to dual rail

RZ pulses. Before an RZ output pulse is generated by the RSLC block, bipolar

input signals must rise to 50% (for G.703 2048 kbit/s) of their peak amplitude.

This level is referred to as the Slicing Level. The threshold criteria insures

accurate pulse or mark recognition in the presence of noise.

The RSLC block provides a squelch alarm, which occurs when input pulses are

below the squelching level threshold. In this state, data is not sliced, which

prevents the detection of noise on an idle transmission line. The SQ status bit in

The RSLC can be configured (in register 5DH) to generate an interrupt whenever

the SQ status bit goes high.

The RSLC block relies on an external network for compliance to G.703 120

Ω

twisted pair or G.703 75

Ω coax. The RSLC block is configured via an off-chip

attenuator pad (see Figure 5). The following network values are recommended

for the two intended applications:

PM6341 Datasheet(PDF) 55 Page - PMC-Sierra, Inc