PM6341 datasheet(96/272 Pages) PMC

96 / 272 page

PM6341 E1XC

DATA SHEET

PMC-910419

ISSUE 8

E1 FRAMER/TRANSCEIVER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Bit

Type

Function

Default

Bit 7

Unused

Bit 6

Unused

Bit 5

Unused

Bit 4

Unused

Bit 3

R/W

BTXCLK

Bit 2

Unused

Bit 1

R/W

BTX2RAIL

Bit 0

R/W

BTXMFP

This register allows software to configure the Transmit backplane interface

format.

BTXCLK:

The BTXCLK bit selects the source of the TRAN transmit clock input signal.

When BTXCLK is set to logic 1, the TRAN transmit clock is driven with the

2.048MHz recovered PCM output clock (RCLKO) from the receiver section.

When BTXCLK is set to logic 0, the TRAN transmit clock is driven with the

2.048MHz backplane transmit clock (BTCLK). Note that this bit must be set

to logic 1 when Line Loopback is enabled.

BTX2RAIL:

The BTX2RAIL bit selects whether the backplane transmit data signal

presented to the transmitter on the multifunction inputs BTPCM/BTDP and

BTSIG/BTDN are in either dual-rail or single-rail format. When BTX2RAIL is

set to logic 1, the multifunction pins become the BTDP and BTDN dual-rail

inputs, which bypass the TRAN and input directly into the jitter attenuator. It is

expected that the framing bits be already inserted into the dual-rail streams

before they are input on BTDP and BTDN. When BTX2RAIL is set to logic 0,

the multifunction pins become the BTPCM and BTSIG digital inputs.

BTXMFP:

The BTXMFP bit selects the type of backplane frame alignment signal

presented to the transmitter BTFP input. When BTXMFP is set to logic 1,

BTFP must be brought high to mark bit 1 of frame 1 of every 16 frame

signalling multiframe and brought low following bit 1 of frame 1 of every 16

frame CRC multiframe. This mode allows both multiframe alignments to be

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