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LAN89218 Datasheet(PDF) 113 Page - Microchip Technology |
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LAN89218 Datasheet(HTML) 113 Page - Microchip Technology |
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113 / 148 page ![]() 2008-2015 Microchip Technology Inc. DS60001255B-page 113 LAN89218 5.5.1 BASIC CONTROL REGISTER Note 1: The default value of this bit is determined by Pin 74 "SPEED_SEL". Refer to the pin description section for more details. Index (In Decimal): 0 Size: 16-bits Bits Description Type Default 15 Reset. 1 = software reset. Bit is self-clearing. For best results, when setting this bit do not set other bits in this register. RW/SC 0 14 Loopback. 1 = loopback mode, 0 = normal operation RW 0 13 Speed Select. 1 = 100 Mbps, 0 = 10 Mbps. Ignored if Auto Negotiation is enabled (0.12 = 1). RW See Note 1 12 Auto-Negotiation Enable. 1 = enable auto-negotiate process (overrides 0.13 and 0.8), 0 = disable auto-negotiate process. RW See Note 1 11 Power Down. 1 = General power down-mode, 0 = normal operation. Note: After this bit is cleared, the PHY may auto-negotiate with it's part- ner station. This process may take a few seconds to complete. Once auto-negotiation is complete, bit 5 of the PHY's Basic Status Register will be set. RW 0 10 Reserved RO 0 9 Restart Auto-Negotiate. 1 = restart auto-negotiate process, 0 = normal oper- ation. Bit is self-clearing. RW/SC 0 8 Duplex Mode. 1 = full duplex, 0 = half duplex. Ignored if Auto Negotiation is enabled (0.12 = 1). RW 0 7 Collision Test. 1 = enable COL test, 0 = disable COL test RW 0 6:0 Reserved RO 0 |
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