 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
AD9163BBCZ Datasheet(PDF) 99 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD9163BBCZ Datasheet(HTML) 99 Page - Analog Devices |
|
|
99 / 124 page  AD9163 Data Sheet Rev. 0 | Page 98 of 123 Hex. Addr. Name Bits Bit Name Settings Description Reset Access 0x412 LID1_REG [7:5] RESERVED Reserved. 0x0 R [4:0] LL_LID1 Received ILAS LID configuration on Lane 1. Lane identification for Lane 1. Link information received on Lane 0 as specified in Section 8.3 of JESD204B. 0x0 R 0x415 CHECKSUM1_REG [7:0] LL_FCHK1 Received checksum during ILAS on lane 1. Checksum for Lane 1. Link information received on Lane 0 as specified in Section 8.3 of JESD204B. 0x0 R 0x416 COMPSUM1_REG [7:0] LL_FCMP1 Computed checksum on Lane 1. Computed checksum for Lane 1 (see description for Register 0x40E). 0x0 R 0x41A LID2_REG [7:5] RESERVED Reserved. 0x0 R [4:0] LL_LID2 Received ILAS LID configuration on Lane 2. Lane identification for Lane 2. 0x0 R 0x41D CHECKSUM2_REG [7:0] LL_FCHK2 Received checksum during ILAS on Lane 2. Checksum for Lane 2. 0x0 R 0x41E COMPSUM2_REG [7:0] LL_FCMP2 Computed checksum on Lane 2. Computed checksum for Lane 2 (see description for Register 0x40E). 0x0 R 0x422 LID3_REG [7:5] RESERVED Reserved. 0x0 R [4:0] LL_LID3 Received ILAS LID configuration on Lane 3. Lane identification for Lane 3. 0x0 R 0x425 CHECKSUM3_REG [7:0] LL_FCHK3 Received checksum during ILAS on Lane 3. Checksum for Lane 3. 0x0 R 0x426 COMPSUM3_REG [7:0] LL_FCMP3 Computed checksum on Lane 3. Computed checksum for Lane 3 (see description for Register 0x40E). 0x0 R 0x42A LID4_REG [7:5] RESERVED Reserved. 0x0 R [4:0] LL_LID4 Received ILAS LID configuration on Lane 4. Lane identification for Lane 4. 0x0 R 0x42D CHECKSUM4_REG [7:0] LL_FCHK4 Received checksum during ILAS on Lane 4. Checksum for Lane 4. 0x0 R 0x42E COMPSUM4_REG [7:0] LL_FCMP4 Computed checksum on Lane 4. Computed checksum for Lane 4 (see description for Register 0x40E). 0x0 R 0x432 LID5_REG [7:5] RESERVED Reserved. 0x0 R [4:0] LL_LID5 Received ILAS LID configuration on Lane 5. Lane identification for Lane 5. 0x0 R 0x435 CHECKSUM5_REG [7:0] LL_FCHK5 Received checksum during ILAS on Lane 5. Checksum for Lane 5. 0x0 R 0x436 COMPSUM5_REG [7:0] LL_FCMP5 Computed checksum on Lane 5. Computed checksum for Lane 5 (see description for Register 0x40E). 0x0 R 0x43A LID6_REG [7:5] RESERVED Reserved. 0x0 R [4:0] LL_LID6 Received ILAS LID configuration on Lane 6. Lane identification for Lane 6. 0x0 R 0x43D CHECKSUM6_REG [7:0] LL_FCHK6 Received checksum during ILAS on Lane 6. Checksum for Lane 6. 0x0 R 0x43E COMPSUM6_REG [7:0] LL_FCMP6 Computed checksum on Lane 6. Computed checksum for Lane 6 (see description for Register 0x40E). 0x0 R |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
