TMS320VC5501 datasheet(113/193 Pages) TI

113 / 193 page

Functional Overview

113

December 2002 − Revised November 2004

SPRS206H

3.15 Peripheral Registers

Each 5501 device has a set of peripheral memory-mapped registers as listed in Table 3−56 through

Table 3−74. Peripheral registers are accessed using the port qualifier. For more information on the use of the

port qualifier, see the TMS320C55x Assembly Language Tools User’s Guide (literature number SPRU280).

Some registers use less than 16 bits. When reading these registers, unused bits are always read as 0.

The user guides for each peripheral contain detailed information on the operation and the functions of each

of the peripheral registers (see Section 4.2, Documentation Support, for a list of documents supporting each

peripheral).

Table 3−56. Peripheral Bus Controller Configuration Registers

WORD ADDRESS

DESCRIPTION

RESET VALUE†

0x0000

Reserved

0x0001

ICR

Idle Configuration Register

0000 0000 0000 0000

0x0002

ISTR

Idle Status Register

0000 0000 0000 0000

0x0003 to 0x000D

Reserved

0x000E

Reserved

0x000F

BOOT_MOD

Boot Mode Register (read only)

Value of GPIO[2:0] at reset

0x0010

Reserved

0x0011

Reserved

0x0100

XCR

XPORT Configuration Register

1000 0000 0000 0000

0x0102

XERR

XPORT Bus Error Register

0000 0000 0000 0000

0x0200

DCR

DPORT Configuration Register

0000 0000 0000 0000

0x0202

DERR

DPORT Bus Error Register

0000 0000 0000 0000

0x0302

IERR

IPORT Bus Error Register

0000 0000 0000 0000

0x07FD

CONFIG

System Configuration Register

1000 0010 0000 0000

0x9000

TOCR

Time-Out Control Register

0000 0000 0000 0001

† x denotes a “don’t care.”

TMS320VC5501 Datasheet(PDF) 113 Page - Texas Instruments

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