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TMS320VC5501 Datasheet(PDF) 124 Page - Texas Instruments

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Part # TMS320VC5501
Description  TMS320VC5501 Fixed-Point Digital Signal Processor
PDF  193 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320VC5501 Datasheet(HTML) 124 Page - Texas Instruments

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Functional Overview
124
December 2002 − Revised November 2004
SPRS206H
Table 3−69. UART
WORD ADDRESS
REGISTER NAME
DESCRIPTION
RESET VALUE†
0x9C00
URRBR/
URTHR/
URDLL‡
Receive Buffer Register
Transmit Holding Register
Divisor Latch LSB Register
xxxx xxxx
0x9C01
URIER/
URDLM§
Interrupt Enable Register
Divisor Latch MSB Register
0000 0000
0x9C02
URIIR/
URFCR¶
Interrupt Identification Register
FIFO Control Register
0000 0001
0000 0000
0x9C03
URLCR
Line Control Register
0000 0000
0x9C04
URMCR
Modem Control Register
0000 0000
0x9C05
URLSR
Line Status Register
0110 0000
0x9C07
URSCR
Scratch Register
xxxx xxxx
0x9C08
URDLL‡
Divisor Latch LSB Register
−
0x9C09
URDLM§
Divisor Latch MSB Register
−
0x9C0A
URPID1
Peripheral ID Register (LSW)
−
0x9C0B
URPID2
Peripheral ID Register (MSW)
−
0x9C0C
URPECR
Power and Emulation Control Register
0000 0000 0000 0000
† x denotes a “don’t care.”
‡ The registers URRBR, URTHR, and URDLL share one address. URDLL also has a dedicated address. When using the dedicated address, the
DLAB bit can be kept cleared, so that URRBR and URTHR are always selected at the shared address.
If DLAB = 0 :
Read Only: URRBR
Write Only: URTHR
If DLAB = 1:
Read/Write: URDLL
§ The registers URIER and URDLM share one address. URDLM also has a dedicated address. When using the dedicated address, the DLAB bit
can be kept cleared, so that URIER is always selected at the shared address.
If DLAB = 0:
Read/WRite: URIER
If DLAB = 1:
Read/Write: URDLM
¶ The registers URIIR and URFCR share one address.
Read Only:
URIIR
Write Only:
URFCR
Table 3−70. External Bus Selection
WORD ADDRESS
REGISTER NAME
DESCRIPTION
RESET VALUE
0x6C00
XBSR
External Bus Selection Register
0000 0000 0000 0000
0x8800
XBCR
External Bus Control Register
0000 0000 0000 0000
Table 3−71. Clock Mode Register
WORD ADDRESS
REGISTER NAME
DESCRIPTION
RESET VALUE
0x8C00
CLKMD
Clock Mode Control Register
0000 0000 0000 0000
Table 3−72. CLKOUT Selector Register
WORD ADDRESS
REGISTER NAME
DESCRIPTION
RESET VALUE
0x8400
CLKOUTSR
CLKOUT Selection Register
0000 0000 0000 0010



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