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PC87351 Datasheet(PDF) 52 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # PC87351
Description  PC87351 PC98 and ACPI Compliant SuperI/O with System Wake-Up Control
PDF  86 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC87351 Datasheet(HTML) 52 Page - National Semiconductor (TI)

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3.0 System Wake-Up Control (SWC) (Continued)
52
www.national.com
3.4
SWC REGISTERS
SWC register offsets are related to a base address determined by the SWC Base Address Register in the device configuration.
The register maps in this chapter use the following abbreviations for Type:
• R/W = Read/Write
• R = Read from a specific address returns the value of a specific register. Write to the same address is to a different
register.
• W = Write
• RO = Read Only
• R/W1C = Read/Write 1 to Clear. Writing 1 to a bit clears it to 0. Writing 0 has no effect.
3.4.1
SWC Register Map
3.4.2
Wake-Up Events Control Register (WKCR)
This register is set to 07h on power-up of VPP or software reset. Detected wake-up events that are enabled activate the
PWUREQ signal.
Location:
Offset 00h
Type:
R/W
Offset Mnemonic
Name
Type
Section
00h
WKCR
Wake-Up Events Control Register
R/W
3.4.2
01h
WKSR
Wake-Up Events Status Register
R/W1C
3.4.3
02h
WKCFG
Wake-Up Configuration Register
R/W
3.4.4
03h
PS2CTL
PS/2 Protocol Control Register
R/W
3.4.5
06h
KDSR
Keyboard Data Shift Register
RO
3.4.6
07h
MDSR
Mouse Data Shift Register
RO
3.4.7
08h-
0Fh
PS2KEY0-
PS2KEY7
PS/2 Keyboard Key Data Registers
R/W
3.4.8
Bit
76543210
Name
PME2
Event
Enable
PME1
Event
Enable
Reserved
Mouse
Event
Enable
KBD
Event
Enable
RING
Event
Enable
RI2
Event
Enable
RI1
Event
Enable
Reset
00000111
Bit
Description
7
PME2 Event Enable
0: Disabled (default)
1: Enabled
6
PME1 Event Enable
0: Disabled (default)
1: Enabled
5
Reserved
4
Mouse Event Enable
0: Disabled (default)
1: Enabled
3
KBD Event Enable
0: Disabled (default)
1: Enabled



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