Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

PC87351 Datasheet(PDF) 63 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # PC87351
Description  PC87351 PC98 and ACPI Compliant SuperI/O with System Wake-Up Control
PDF  86 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC87351 Datasheet(HTML) 63 Page - National Semiconductor (TI)

Back Button PC87351 Datasheet HTML 59Page - National Semiconductor (TI) PC87351 Datasheet HTML 60Page - National Semiconductor (TI) PC87351 Datasheet HTML 61Page - National Semiconductor (TI) PC87351 Datasheet HTML 62Page - National Semiconductor (TI) PC87351 Datasheet HTML 63Page - National Semiconductor (TI) PC87351 Datasheet HTML 64Page - National Semiconductor (TI) PC87351 Datasheet HTML 65Page - National Semiconductor (TI) PC87351 Datasheet HTML 66Page - National Semiconductor (TI) PC87351 Datasheet HTML 67Page - National Semiconductor (TI) Next Button
Zoom Inzoom in Zoom Outzoom out
 63 / 86 page
background image
4.0 General-Purpose Input/Output (GPIO) Port (Continued)
63
www.national.com
4.4.5
GPIO Interrupt Enable Register (GPIEN)
Location:
Device specific
Type:
R/W
4.4.6
GPIO Status Register (GPST)
Location:
Device specific
Type:
R/W1C
Bit
76543210
Name
Interrupt Enable
Reset
00000000
Bit
Description
7
Interrupt Enable. Bits 7-0 correspond to pins 7-0 respectively. Each bit enables Interrupt generation by the
corresponding GPIO pin. The bit has no effect on the corresponding Status bit in the GPST Register.
0: IRQ generation by corresponding GPIO pin masked
1: IRQ generation by corresponding GPIO pin enabled
6
5
4
3
2
1
0
Bit
76543210
Name
Status
Reset
00000000
Bit
Description
7
Status. Bits 7-0 correspond to pins 7-0 respectively. Each bit is an edge detector that is set to 1 by the hardware
upon detection of an active edge (i.e. edge that matches the IRQ Polarity bit) on the corresponding GPIO pin.
This edge detection is independent of the IRQ Type or the Interrupt Enable bit in the GPIEN Register. However,
the bit may reflect the IRQ status for enabled, edge-trigger IRQ sources. Writing 1 to the Status bit clears it to 0.
0: No active edge detected since last cleared
1: Active edge detected
6
5
4
3
2
1
0



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com