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PC87351 Datasheet(PDF) 54 Page - National Semiconductor (TI) |
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PC87351 Datasheet(HTML) 54 Page - National Semiconductor (TI) |
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54 / 86 page ![]() 3.0 System Wake-Up Control (SWC) (Continued) 54 www.national.com 3.4.4 Wake-Up Configuration Register (WKCFG) This register is set to 00h on power-up of VPP or software reset. Location: Offset 02h Type: R/W 3.4.5 PS/2 Protocol Control Register (PS2CTL) This register is set to 00h on power-up of VPP or software reset. It configures the PS/2 Keyboard and Mouse wake-up features. Location: Offset 03h Type: R/W Bit 76543210 Name Reserved PME2 Type PME2 Polarity PME1 Type PME1 Polarity Swap KBC Inputs Reserved Reset 00000000 Bit Description 7 Reserved 6 PME2 Type 0: Edge 1: Level 5 PME2 Polarity 0: Falling edge, low level 1: Rising edge, high level 4 PME1 Type 0: Edge 1: Level 3 PME1 Polarity 0: Falling edge, low level 1: Rising edge, high level 2 Swap KBC Inputs 0: No swapping (default) 1: KBD (KBCLK, KBDAT) and Mouse (MCLK, MDAT) inputs swapped 1-0 Reserved Bit 76543210 Name Disable Parity Check Mouse Wake-Up Configuration Keyboard Wake-Up Configuration Reset 00000000 |
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