PC87351 datasheet(9/86 Pages) NSC

9 / 86 page

Table of Contents (Continued)

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3.4.4

Wake-Up Configuration Register (WKCFG) ................................................................ 54

3.4.5

PS/2 Protocol Control Register (PS2CTL) ................................................................... 54

3.4.6

Keyboard Data Shift Register (KDSR) ......................................................................... 55

3.4.7

Mouse Data Shift Register (MDSR) ............................................................................. 55

3.4.8

PS/2 Keyboard Key Data Registers (PS2KEY0 - PS2KEY7) ...................................... 56

3.5

SWC REGISTER BITMAP ......................................................................................................... 56

4.0

General-Purpose Input/Output (GPIO) Port

4.1

OVERVIEW ............................................................................................................................... 57

4.2

BASIC FUNCTIONALITY ..........................................................................................................58

4.2.1

Configuration Options .................................................................................................. 58

4.2.2

Operation ..................................................................................................................... 58

4.3

INTERRUPT ASSERTION AND HANDLING ............................................................................ 59

4.3.1

Interrupt Configuration ................................................................................................. 59

4.3.2

Interrupt Assertion ....................................................................................................... 59

4.4

GPIO PORT REGISTERS ......................................................................................................... 60

4.4.1

GPIO Pin Configuration Access Register .................................................................... 60

4.4.2

GPIO Port Runtime Register Map ............................................................................... 61

4.4.3

GPIO Data Out Register (GPDO) ................................................................................ 62

4.4.4

GPIO Data In Register (GPDI) .................................................................................... 62

4.4.5

GPIO Interrupt Enable Register (GPIEN) .................................................................... 63

4.4.6

GPIO Status Register (GPST) ..................................................................................... 63

5.0

Fan Speed Control

5.1

OVERVIEW ............................................................................................................................... 64

5.2

FUNCTIONAL DESCRIPTION .................................................................................................. 64

5.3

FAN SPEED CONTROL REGISTERS ...................................................................................... 65

5.3.1

Fan Speed Control Register Map ................................................................................ 65

5.3.2

Fan Control Pre-Scale Register (FCPSR) ................................................................... 65

5.3.3

Fan Control Duty Cycle Register (FCDCR) ................................................................. 65

5.4

FAN SPEED CONTROL BITMAP ............................................................................................. 66

6.0

Floppy Disk Controller (FDC)