WM8233 datasheet(59/146 Pages) CIRRUS

59 / 146 page

WM8233

Rev 4.7

DATA OUTPUT CONFIGURATION

Figure 47 shows the procedure for Data Output Configuration. WM8233 provides 10-bit CMOS output

and various LVDS output formats. See

“Output Data Format” section for details of LVDS and CMOS

output format.

DATA output configuration

Output mode

Selection

LVDS output

configuration

CMOS output

configuration

0x07[5]

CMOSMODE=0

0x07[5]

CMOSMODE=1

0x07[7] OE_OP=1

Data output enabled

Output pin

enabled

Data output

enabled

0x07[6] OUTPD=0

PLL/DLL

Configuration (*1)

Figure 47 Data Output Configuration

Notes: 1. For details, see

“PLL/DLL Configuration” section.

CMOS Output Configuration

Figure 48 shows the procedure for CMOS Output Configuration. Output drivability must be set when

CMOS output is selected. In CMOS output mode, flag signal will be output from DCLKN/OC[2] pin.

CMOS output configuration

0x0D[2:0] OP_DRV

Output drivability

configuration (*1)

0xB4[3:0]

SEL_FLAG

0xA3,0xA4 FLAGPIX

Flag output timing

configuration

Flag signal

Selection

PO* pulse

Flagpix

Flag output

(1 pixel period)

Flag output

(PO* period)

Line length

configuration

enabled

0xA1,0xA2 LLENGTH

0xA0[0] TG_EN

TG mode

selection

Master mode

0xA0[1] TGMD=1

Slave mode

0xA0[1] TGMD=0

TG enabled (*2)

Output flag configuration

Use

flag signal

Yes

Figure 48 CMOS Output Configuration

WM8233 Datasheet(PDF) 59 Page - Cirrus Logic

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