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WM8233 Datasheet(PDF) 40 Page - Cirrus Logic

Part # WM8233
Description  210MSPS 6-Channel AFE with Sensor
PDF  146 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8233 Datasheet(HTML) 40 Page - Cirrus Logic

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WM8233
40
Rev 4.7
TG MASK TIMING
The WM8233 has a TG clock mask function. M1, M2 and M3 pulses specify the mask period; T1 and
T2 pulses are used for changing the signal polarity during the mask period. C_CK1 and C_CK2 are
applied to the M pulse only; they cannot be applied to the T pulse. C_CK3 and C_CK4 are applied to
M1 and T1; C_CK5 and C_CK6 are applied to M2 and T2. The mask timing is synchronized with
TGCKO rise edge.
N-1
N
CKGO3
(Internal)
VSMP
TGCK
pixcnt
TGCKO
N+1
M-2
N+2
M+1
C_CK3
M+2
M+3
M-1
N+3
k
M2@TGCK
M2@TGCK
O
rise@count N
High@TP2
CKGO3 + M2
T2@TGCK
T2@TGCK
O
Low@TP1
P1
TP1
P2
TP2
M
M-1
fall@count M-1
TP1
TP2
Figure 22 TG Mask Timing
TG CLOCK
APPLIED
“M” PULSE
APPLIED
“T” PULSE
C_CK1
C_CK2
M3
none
C_CK3
C_CK4
M1
T1
C_CK5
C_CK6
M2
T2
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R195 (C3h)
7:0
M1_RISE[7:0]
0000_0000
M1 pulse rise count (mask start)
R196 (C4h)
6:0
M1_RISE[6:0]
000_0000
M1 pulse rise count (mask start)
R197 (C5h)
7:0
M1_FALL[7:0]
0000_0000
M1 pulse fall count (mask end)
R198 (C6h)
6:0
M1_FALL[6:0]
000_0000
M1 pulse fall count (mask end)
R199 (C7h)
7:0
M2_RISE[7:0]
0000_0000
M2 pulse rise count (mask start)
R200 (C8h)
6:0
M2_RISE[6:0]
000_0000
M2 pulse rise count (mask start)
R201 (C9h)
7:0
M2_FALL[7:0]
0000_0000
M2 pulse fall count (mask end)
R202 (CAh)
6:0
M2_FALL[6:0]
000_0000
M2 pulse fall count (mask end)
R203 (CBh)
7:0
M3_RISE[7:0]
0000_0000
M3 pulse rise count (mask start)
R204 (CCh)
6:0
M3_RISE[6:0]
000_0000
M3 pulse rise count (mask start)
R205 (CDh)
7:0
M3_FALL[7:0]
0000_0000
M3 pulse fall count (mask end)
R206 (CEh)
6:0
M3_FALL[6:0]
000_0000
M3 pulse fall count (mask end)
R271 (010Fh)
– R278 (116h)
7:0
POL*_T1
1111_1111
polarity of T1 pulse at TP*
7:0
POL*_T2
1111_1111
polarity of T2 pulse at TP*



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