| Electronic Components Datasheet Search |
|
WM8233 Datasheet(PDF) 6 Page - Cirrus Logic |
|
|
|||||||||||||||||||||||||||||
WM8233 Datasheet(HTML) 6 Page - Cirrus Logic |
|
6 / 146 page ![]() WM8233 6 Rev 4.7 PIN DESCRIPTION PIN NAME TYPE DESCRIPTION 1 VREF2C Analogue output Mid reference voltage. This pin must be connected to AGND via a decoupling capacitor. 2 VRLC/VBIAS Analogue I/O Reference voltage input/output 3 VREF3C Analogue output Lower reference voltage. This pin must be connected to AGND via a decoupling capacitor. 4 VREF1C Analogue output Upper reference voltage. This pin must be connected to AGND via a decoupling capacitor. 5 SEN Digital input Enables the serial interface when high. 6 SDO Digital output Serial interface data output 7 SCK Digital input Serial interface clock. 8 SDI Digital input Serial interface data input 9 LDO2VDD Supply Analogue supply 10 LDO2GND Supply Analogue ground 11 LDO2VOUT Supply LDO output This pin must be connected to AGND via a decoupling capacitor. 12 DSLCT2 Analogue input Device select 2 13 MCLK Analogue input Master clock 14 DSLCT1 Analogue input Device select 1 15 D5N/OP[9] LVDS output LVDS Data output 5 – Negative / CMOS output 9. 16 D5P/OP[8] LVDS output LVDS Data output 5 – Positive / CMOS output 8. 17 D4N/OP[7] LVDS output LVDS Data output 4 – Negative / CMOS output 7. 18 D4P/OP[6] LVDS output LVDS Data output 4 – Positive / CMOS output 6. 19 DCLKN/OC[2] LVDS output LVDS Clock Output – Negative/ CMOS flag output. 20 DCLKP/OC[1] LVDS output LVDS Clock Output – Positive/ CMOS clock output. 21 DBGND Supply Analogue ground 22 DBVDD Supply Analogue supply 23 D3N/OP[5] LVDS output LVDS Data output 3 – Negative / CMOS output 5. 24 D3P/OP[4] LVDS output LVDS Data output 3 – Positive / CMOS output 4. 25 D2N/OP[3] LVDS output LVDS Data output 2 – Negative / CMOS output 3. 26 D2P/OP[2] LVDS output LVDS Data output 2 – Positive / CMOS output 2. 27 D1N/OP[1] LVDS output LVDS Data output 1 – Negative / CMOS output 1. 28 D1P/OP[0] LVDS output LVDS Data output 1 – Positive / CMOS output 0. 29 HZCTRL Digital input Internal use only. Must be connected to AGND. 30 MON Analogue output Clock monitor 31 LDO1VOUT Supply LDO output. This pin must be connected to AGND via a decoupling capacitor. 32 LDO1GND Supply Analogue ground 33 LDO1VDD Supply Analogue supply 34 TGSYNC Digital I/O Sensor Timing Sync pulse 35 CLK1 Digital output Sensor Timing Output 1 36 CLK2 Digital output Sensor Timing Output 2 37 CLK3 Digital output Sensor Timing Output 3 38 CLK4 Digital output Sensor Timing Output 4 39 CLK5 Digital output Sensor Timing Output 5 40 CLK6 Digital output Sensor Timing Output 6 41 CLK7 Digital output Sensor Timing Output 7 42 CLK8 Digital output Sensor Timing Output 8 43 CLK9 Digital output Sensor Timing Output 9 44 CLK10 Digital output Sensor Timing Output 10 45 CLK11 Digital output Sensor Timing Output 11 46 AGND3 Supply Analogue ground |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |