AD9684 datasheet(37/65 Pages) AD

37 / 65 page

AD9684

Data Sheet

For example, if the chip decimation ratio is set to decimate by 4,

DDC 0 is set to use HB2 + HB1 filters (complex outputs,

decimate by 4) and DDC 1 is set to use HB4 + HB3 + HB2 +

HB1 filters (real outputs, decimate by 8). DDC 1 repeats its

output data two times for every one DDC 0 output. The

resulting output samples are shown in Table 15.

Table 15. Chip Decimation Ratio = 4, DDC 0 Decimation = 4 (Complex), and DDC 1 Decimation = 8 (Real)

DDC 0

DDC 1

DDC Input Samples

Output Port I

Output Port Q

Output Port I

Output Port Q

I0 (N)

Q0 (N)

I1 (N)

Not applicable

N + 1

N + 2

N + 3

N + 4

I0 (N + 1)

Q0 (N + 1)

I1 (N + 1)

Not applicable

N + 5

N + 6

N + 7

N + 8

I0 (N + 2)

Q0 (N + 2)

I1 (N)

Not applicable

N + 9

N + 10

N + 11

N + 12

I0 (N + 3)

Q0 (N + 3)

I1 (N + 1)

Not applicable

N + 13

N + 14

N + 15

Rev. 0 | Page 36 of 64

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