AD9684 datasheet(60/65 Pages) AD

60 / 65 page

Data Sheet

AD9684

Reg.

Addr.

(Hex)

Name

Bit 7

(MSB)

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0 (LSB)

Default

Notes

0x330

DDC 1

control

Mixer

select

0 = real

mixer

1 =

complex

mixer

Gain select

0 = 0 dB

gain

1 = 6 dB

gain

IF mode

00 = variable IF mode

(mixers and NCO

enabled)

01 = 0 Hz IF mode (mixer

bypassed, NCO disabled)

10 = fS/4 Hz IF mode (fS/4

downmixing mode)

11 = test mode (mixer

inputs forced to +FS,

NCO enabled)

Complex to

real enable

0 = disabled

1 = enabled

Decimation rate select

(complex to real

disabled)

11 = decimate by 2

(complex to real

enabled)

11 = decimate by 1

0x00

0x331

DDC 1

input

selection

Q input

select

0 = Ch. A

1 = Ch. B

I input

select

0 = Ch. A

1 = Ch. B

0x00

0x334

DDC 1

frequency

LSB

DDC 1 NCO FTW, Bits[7:0], twos complement

0x00

0x335

DDC 1

frequency

MSB

DDC 1 NCO FTW, Bits[11:8], twos complement

0x00

0x340

DDC 1

phase LSB

DDC 1 NCO POW, Bits[7:0], twos complement

0x00

0x341

DDC 1

phase MSB

DDC 1 NCO POW, Bits[11:8], twos complement

0x00

0x347

DDC 1

output test

mode

selection

Q output

test mode

enable

0 = disabled

1 = enabled

from

Ch. B

I output

test mode

enable

0 =

disabled

1 =

enabled

from Ch. A

0x00

0x350

DDC 2

control

Mixer

select

0 = real

mixer

1 =

complex

mixer

Gain select

0 = 0 dB

gain

1 = 6 dB

gain

IF mode

00 = variable IF mode

(mixers and NCO

enabled)

01 = 0Hz IF mode (mixer

bypassed, NCO disabled)

10 = fS/4 Hz IF mode (fS/4

downmixing mode)

11 = test mode (mixer

inputs forced to +FS, NCO

enabled)

Complex to

real enable

0 = disabled

1 = enabled

Decimation rate select

(complex to real

disabled)

11 = decimate by 2

00 = decimate by 4

01 = decimate by 8

10 = decimate by 16

(complex to real

enabled)

11 = decimate by 1

00 = decimate by 2

01 = decimate by 4

10 = decimate by 8

0x00

0x351

DDC 2

input

selection

Q input

select

0 = Ch. A

1 = Ch. B

I input

select

0 = Ch. A

1 = Ch. B

0x00

0x354

DDC 2

frequency

LSB

DDC 2 NCO FTW, Bits[7:0], twos complement

0x00

0x355

DDC 2

frequency

MSB

DDC 2 NCO FTW, Bits[11:8], twos complement

0x00

0x360

DDC 2

phase LSB

DDC 2 NCOPOW, Bits[7:0], twos complement

0x00

0x361

DDC 2

phase MSB

DDC 2 NCO POW, Bits[11:8], twos complement

0x00

Rev. 0 | Page 59 of 64

AD9684 Datasheet(PDF) 60 Page - Analog Devices

AD9684 Datasheet(HTML) 60 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65

Datasheet Download

Link URL