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LAN9220 Datasheet(PDF) 84 Page - Microchip Technology

Part # LAN9220
Description  16-bit Non-PCI Small Form Factor 10/100 Ethernet Controller with Variable Voltage I/O & HP Auto-MDIX Support
PDF  142 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN9220 Datasheet(HTML) 84 Page - Microchip Technology

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LAN9220
DS00002417A-page 84
 2006-2017 Microchip Technology Inc.
5.3.16
GPT_CNT-GENERAL PURPOSE TIMER CURRENT COUNT REGISTER
This register reflects the current value of the GP Timer.
5.3.17
WORD_SWAP—WORD SWAP CONTROL
This register controls how words from the host data bus are mapped to the CSRs and Data FIFOs inside the LAN9220.
The LAN9220 always sends data from the Transmit Data FIFO to the network so that the low order word is sent first,
and always receives data from the network to the Receive Data FIFO so that the low order word is received first.
Offset:
90h
Size:
32 bits
Bits
Description
Type
Default
31-16
Reserved
RO
-
15-0
General Purpose Timer Current Count (GPT_CNT). This 16-bit field
reflects the current value of the GP Timer.
RO
FFFFh
Offset:
98h
Size:
32 bits
Bits
Description
Type
Default
31:0
Word Swap. If this field is set to 00000000h, or anything except
0xFFFFFFFFh, the LAN9220 maps words with address bit A[1]=1 to the
high order words of the CSRs and Data FIFOs, and words with address bit
A[1]=0 to the low order words of the CSRs and Data FIFOs. If this field is
set to 0xFFFFFFFFh, the LAN9220 maps words with address bit A[1]=1 to
the low order words of the CSRs and Data FIFOs, and words with address
bit A[1]=0 to the high order words of the CSRs and Data FIFOs.
Note:
Word swap is used in conjunction with the mixed endian function-
ality to determine the final byte ordering. Refer to Section 3.7.3,
"Mixed Endian Support" for more information.
R/W
NASR
00000000h



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