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LAN9220 Datasheet(PDF) 137 Page - Microchip Technology |
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LAN9220 Datasheet(HTML) 137 Page - Microchip Technology |
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137 / 142 page ![]() 2006-2017 Microchip Technology Inc. DS00002417A-page 137 LAN9220 APPENDIX A: DATA SHEET REVISION HISTORY TABLE A-1: REVISION HISTORY Revision Level & Date Section/Figure/Entry Correction DS00002417A (03-31-17) Replaces previous SMSC version Rev. 2.9 (03-01-12) Note 3-11 on page 39 Changed from: "After any PHY reset, the application must wait until the "Link Status" bit in the PHY's "Basic Status Register" (PHY Reg. 1.2) is set before attempting to transmit or receive data." To: "After any PHY reset, the application should wait until the "Link Status" bit in the PHY's "Basic Status Register" (PHY Reg. 1.2) is set before attempting to transmit data, otherwise data written to the TX FIFO will only be sent when the Link Status returns to "Up"." Rev. 2.9 (03-01-12) Section 5.4.8, "FLOW— Flow Control Register," on page 100 Updated Pass Control Frames (bit 2) description to “When set, the MAC will pass the pause frame to the host...” Rev. 2.8 (07-14-11) Table 2-4, “System and Power Signals,” on page 11 nLED1 description modified to indicate that the signal is driven low when operating speed is 100Mbs and is driven high during autonegotiation, when the cable is disconnected, and during 10 Mbs operation. Section 5.2.1, "RX FIFO Ports," on page 67 RX Data FIFO port is aliased to 16 WORD locations, not 16 DWORD locations. Section 5.2.2, "TX FIFO Ports," on page 67 TX Data FIFO port is aliased to 16 WORD locations, not 16 DWORD locations. Section 3.6.3.1, "TX Checksum Calculation," on page 25 Added note stating TX Checksum calculation should not be used for UDP packets under IPv6. Rev. 2.7 (03-15-10) Section 2.0, "Pin Description and Configuration," on page 8 Added pin 1 designator to pin diagram Section 7.2, "Operating Conditions**," on page 126 Added note: “Do not drive input signals without power supplied to the device.” Section 6.9, "Power Sequence Timing," on page 123 Added power sequence timing section Rev. 2.5 (11-13-08) All Fixed various typos Rev. 2.4 (10-24-08) All Fixed various typos Table 7-1 on page 127 and Table 7-2 on page 128 Added power consumption values. Section 7.5, "Worst Case Current Consumption," on page 129 Updated with current consumption values for various VDDVARIO values. Section 7.6, "DC Electrical Specifications," on page 130 Added input capacitance and input leakage values. |
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