LT8601 datasheet(12/26 Pages) LINER

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LT8601

8601fa

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operaTion

The LT8601 is a triple channel, constant frequency, cur-

rent mode, monolithic buck switching regulator with

power-on reset. All channels are synchronized to a single

oscillator. Two of the channels are high voltage capable

(up to 42V input) while the other is low voltage capable

(up to 5.5V input) and is typically powered from the high

voltage buck outputs.

Start-Up

When enabled by setting the EN/UVLO voltage above its

threshold, the LT8601 starts charging the INTVCC capaci-

tor from VIN. If BIAS is higher than 3.2V, BIAS supplies

current to the INTVCC regulator to reduce VIN quiescent

current.

High Voltage Buck Regulators

Each high voltage channel is a synchronous buck regu-

lator that operates from an independent PVIN pin. The

internal top power MOSFET is turned on at the beginning

of each oscillator cycle, and turned off when the current

flowing through the top MOSFET reaches a level deter-

mined by the error amplifier. The error amplifier measures

the output voltage through an external resistor divider

tied to the FB pin to control the peak current in the top

switch. The reference of the error amplifier is determined

by the lower of the internal 1V reference and the voltage

at its TRKSS pin.

While the top MOSFET is off, the bottom MOSFET is

turned on for the remainder of the oscillator cycle or until

the inductor current starts to reverse. If overload condi-

tions result in more than 2A for channel 1 or 3.3A for

channel 2 flowing through the bottom switch, the next

clock cycle will be delayed until switch current returns

to a safe level.

Low Voltage Buck Regulator

The low voltage channel is a synchronous buck regulator

that operates from an independent PVIN pin. The PVIN pin

has an undervoltage lockout set at 2.35V (typical). Each

internal top power MOSFET is turned on at the beginning

of each oscillator cycle, and turned off when the current

flowing through the top MOSFET reaches a level deter-

mined by the error amplifier. The error amplifier measures

the output voltage through an external resistor divider tied

to the FB pin to control the peak current in the top switch.

The reference of the error amplifier is an internal 800mV

reference. The low voltage channel has a RUN pin to allow

power sequencing and an internal soft-start circuit ramps

the output voltage up in 1ms.

While the top MOSFET is off, the bottom MOSFET is

turned on for the remainder of the oscillator cycle or until

the inductor current starts to reverse. If overload condi-

tions result in more than 2.4A flowing through the bottom

switch, the next clock cycle will be delayed until switch

current returns to a safe level.

Multiphase Switching

The oscillator generates two clock signals 180° out of

phase. Channel 1 operates from CLK1, while channels

2 and 3 operate from CLK2. Since a buck regulator only

draws input current during the top switch on-cycle, mul-

tiphase operation reduces peak input current and doubles

the input current frequency. These effects reduce input

current ripple and reduce the input capacitance required.

Light Load Operation

At light load, the regulators operate in low ripple Burst

Mode operation. Low ripple Burst Mode operation shuts

down most internal circuitry between switch on-cycles

to conserve power while still retaining low ripple at the

output.

Undervoltage Lockout

The EN/UVLO pin is used to put the LT8601 in shutdown,

reducing the input current to less than 1μA. The accurate

1.2V (rising) threshold of the EN/UVLO pin provides a pro-

grammable VIN undervoltage lockout through an external

resistor divider tied to the EN/UVLO pin. A 50mV (typical)

hysteresis voltage on the EN/UVLO pin prevents switch-

ing noise from inadvertently shutting down the LT8601.

Power Good Comparators

Each channel has a power good comparator that trips

when the feedback pin is above or below its reference

voltage by more than 8%. The PG output pins are open-

drain. The PG pin for each channel is pulled low when the

corresponding output is out of regulation. The PG outputs

are not valid until INTVCC rises to 2.7V

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