LTM4677 datasheet(49/128 Pages) LINER

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LTC3884/LTC3884-1

3884fe

For more information www.linear.com/LTC3884

APPLICATIONS INFORMATION

Due to possible PCB noise in the current sensing loop, the

AC current sensing ripple of ∆VSENSE = ∆IL • RSENSE also

needs to be checked in the design to get a good signal-to-

noise ratio. In general, for a reasonably good PCB layout,

a 15mV minimum ∆VSENSE voltage is recommended as a

conservative number to start with for RSENSEapplications.

For previous generation current mode controllers, the

maximum sense voltage was high enough (e.g., 75mV for

the LTC1628/LTC3728 family) that the voltage drop across

the parasitic inductance of the sense resistor represented

a relatively small error. In the newer and higher current

density solutions, the value of the sense resistor can be

less than 1mΩ and the peak sense voltage can be less than

20mV. Also, inductor ripple currents greater than 50%

with operation up to 750kHz are becoming more common.

Under these conditions, the voltage drop across the sense

resistor’s parasitic inductance is no longer negligible. A

typical sensing circuit using a discrete resistor is shown in

Figure 28b. In previous generations of controllers, a small

RC filter placed near the IC was commonly used to reduce

the effects of the capacitive and inductive noise coupled

in the sense traces on the PCB. A typical filter consists of

two series 100Ω resistors connected to a parallel 1000pF

capacitor, resulting in a time constant of 200ns.

This same RC filter, with minor modifications, can be used

to extract the resistive component of the current sense

signalinthepresenceofparasiticinductance.Forexample,

Figure 29a illustrates the voltage waveform across a 2mΩ

resistor with a PCB footprint of 2010. The waveform is

the superposition of a purely resistive component and a

purely inductive component. It was measured using two

scope probes and waveform math to obtain a differential

measurement. Based on additional measurements of the

inductor ripple current and the on-time, tON, and off-time,

tOFF,ofthetopswitch,thevalueoftheparasiticinductance

was determined to be 0.5nH using the equation:

ESL

VESL(STEP)

ΔIL

•

tON • tOFF

tON + tOFF

(1)

If the RC time constant is chosen to be close to the para-

sitic inductance divided by the sense resistor (L/R), the

resultantwaveformlooksresistive,asshowninFigure 29b.

For applications using low maximum sense voltages,

check the sense resistor manufacturer’s data sheet for

information about parasitic inductance. In the absence of

data, measure the voltage drop directly across the sense

resistor to extract the magnitude of the ESL step and use

Equation1todeterminetheESL.However,donotoverfilter

the signal. Keep the RC time constant less than or equal to

the inductor time constant to maintain a sufficient ripple

voltage on VRSENSE for optimal operation of the current

loop controller.

SLOPE COMPENSATION AND INDUCTOR PEAK

CURRENT

Slope compensation provides stability in constant-

frequency current-mode architectures by preventing

sub-harmonic oscillations at high duty cycles. This is ac-

complished internally by adding a compensation ramp to

the inductor current signal. The LTC3884 uses a patented

current limit technique that counteracts the compensating

ramp. This allows the maximum inductor peak current to

remain unaffected throughout all duty cycles.

Figure 29a. Voltage Measured Directly Across RSENSE

Figure 29b. Voltage Measured After the RSENSE Filter

500ns/DIV

VSENSE

20mV/DIV

3884 F29a

VESL(STEP)

500ns/DIV

VSENSE

20mV/DIV

3884 F29b

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