SSM3525 datasheet(34/60 Pages) AD

34 / 60 page

SSM3525

Data Sheet

Rev. A | Page 34 of 60

The timing of a single word read operation is shown in Figure 83.

The first R/W bit is 0, indicating a write operation followed by

the subaddress of the register to be read. After the SSM3525

acknowledges the receipt of the subaddress, the master must issue

a repeated start command followed by the chip address byte with

the R/W set to 1 (read). The SSM3525 acknowledges and puts

8-bit data on the SDA pin. The master then responds every

ninth pulse with an acknowledge pulse to the SSM3525.

Figure 81 through Figure 84 use the following abbreviations:

•

S is the start bit

•

P is the stop bit

•

AM is the acknowledge by master

•

AS is the acknowledge by slave

Table 19. I2C Device Address Byte Format Using the ADDR Pin1

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

R/W

X means don’t care.

Table 20. ADDR Pin to I2C Device Address Mapping

ADDR Pin

ADDR Voltage

I2C Address Bit 2

I2C Address Bit 1

GND

Pull-Down 47 kΩ Resistor

0.25 × IOVDD

Open

0.5 × IOVDD

Pull-Up 47 kΩ Resistor

0.75 × IOVDD

IOVDD

Not applicable

ACK

SDA

(CONTINUED)

FRAME 3

DATA BYTE 1

FRAME 4

DATA BYTE 2

STOP BY

MASTER

SCK

(CONTINUED)

ACK

R/W

ACK

SDA

FRAME 1

CHIP ADDRESS BYTE

FRAME 2

SUBADDRESS BYTE

START BY

MASTER

SCK

Figure 80. I2C Read/Write Timing

START

BIT

I2C ADDRESS

(7 BITS)

SUBADDRESS

(8 BITS)

R/W= 0

ACK BY

SLAVE

ACK BY

SLAVE

DATA BYTE 1

(8 BITS)

STOP

BIT

Figure 81. Single Word I2C Write Format

CHIP ADDRESS,

R/W = 0

SUBADDRESS

DATA

WORD 2

DATA

WORD 1

Figure 82. Burst Mode I2C Write Format

CHIP ADDRESS,

R/W = 0

SUBADDRESS

CHIP ADDRESS,

R/W = 1

DATA

BYTE 1

DATA

BYTE N

Figure 83. Single Word I2C Read Format

CHIP ADDRESS,

R/W = 0

SUBADDRESS

CHIP ADDRESS,

R/W = 1

DATA

WORD 1

Figure 84. Burst Mode I2C Read Format

SSM3525 Datasheet(PDF) 34 Page - Analog Devices

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