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SSM3525 Datasheet(PDF) 8 Page - Analog Devices

Part # SSM3525
Description  30 W, Filterless, Class D, Output Sensing Audio Amplifier
PDF  60 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

SSM3525 Datasheet(HTML) 8 Page - Analog Devices

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SSM3525
Data Sheet
Rev. A | Page 8 of 60
Table 5. Serial Port Digital Input Timing (I2S/TDM Operation Modes Only)
Parameter
Min
Max
Unit
Description
SERIAL PORT
tBIL
8
ns
BCLK low pulse width
tBIH
8
ns
BCLK high pulse width
tSIS
4
ns
SDATAI setup time to BCLK rising edge
tSIH
4
ns
SDATA hold time from BCLK rising edge
tLIS
5
ns
FSYNC setup time to BCLK rising edge
tLIH
5
ns
FSYNC hold time to BCLK rising edge
tBP
20
ns
Minimum BCLK period
Table 6. Serial Port Digital Output Timing (I2S/TDM Operation Modes Only)
Parameter
Min
Max
Unit
Description
SERIAL PORT
tBIL
8
ns
BCLK low pulse width.
tBIH
8
ns
BCLK high pulse width.
tSIS
4
ns
SDATAO setup time to BCLK rising edge
tSIH
4
ns
SDATA hold time from BCLK rising edge
tLIS
5
ns
FSYNC setup time to BCLK rising edge
tLIH
5
ns
FSYNC hold time to BCLK rising edge
tBP
20
ns
Minimum BCLK period
Table 7. PDM Timing Parameters
Parameter
Limit
Unit
Description
Min
Max
PDM Clock Frequency
2.048
6.144
MHz
tFALL
10
ns
Clock fall time
tRISE
10
ns
Clock rise time
tSETUP
10
ns
Data setup time
tHOLD
7
ns
Data hold time
Digital Timing Diagrams
SDA
SCL
START
CONDITION
STOP
CONDITION
tSCH
tSCR
tSCLH
tSCS
tDS
tSCH
tSCLL
tSCF
tBFT
Figure 2. I2C Port Timing



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