SSM3525 datasheet(28/60 Pages) AD

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SSM3525

Data Sheet

Rev. A | Page 28 of 60

The VBAT supply voltage at which the limiter threshold level

begins to decrease the output level is determined by the VBAT

inflection point, the VBAT_INF bits (Register 0x0A, Bits[7:0]).

The VBAT_INF point is defined as the battery voltage at which

the limiter either activates or deactivates depending on the

LIM_EN mode (see Table 18). When the battery voltage is

greater than VBAT_INF, the limiter is not active. When the

battery voltage is less than VBAT_INF, the limiter is activated.

The VBAT_INF bits can be set from 4 V to 18 V. The 8-bit value

for the voltage can be calculated using the following equation:

Voltage = 4 + 14 × Decimal Value/255

Convert the decimal value to an 8-bit hexadecimal value and

use it to set the VBAT_INF bits.

The rate at which the limiter threshold is lowered relative to

the amount of change in VBAT below the VBAT_INF point is

determined by the slope bits (Register 0x09, Bits[1:0]).

The slope is the ratio of the limiter threshold reduction to the

VBAT voltage reduction.

Slope = ∆Limiter Threshold/∆VBAT

The slope ratio can be set from 1:1 to 4:1. This function is useful

to prevent early shutdown under low battery conditions. As the

VBAT voltage falls, the limiter threshold is lowered. The limiter

reduces the output level, therefore helping reduce the current

drawn from the battery and preventing early shutdown due to low

VBAT.

The limiter offers various active modes, which can be set using the

LIM_EN bits (Register 0x08, Bits[1:0]) and the VBAT_TRACK bit,

as shown in Table 18.

When LIM_EN = 01, the limiter is enabled. When LIM_EN = 10,

the limiter mutes the output if VBAT falls below VBAT_INF. When

LIM_EN = 11, the limiter engages only when the battery voltage

is lower than VBAT_INF.

When VBAT is above VBAT_INF, no limiting occurs. There is

hysteresis around VBAT_INF for the limiter disengaging.

The limiter, when active, reduces the gain of the amplifier. The rate

of gain reduction or attack rate is determined by the LIM_ATR bits

(Register 0x08, Bits[5:4]). Similarly, when the signal level drops

below the limiter threshold, the gain is restored. The gain release

rate is determined by the LIM_RRT bits (Register 0x08, Bits[7:6]).

INPUT LEVEL

AMPLIFIER CLIPPING LEVEL

LIM_EN = 00

VBAT_TRACK = 0

Figure 70. Limiter Example (LIM_EN = 0b00, VBAT_TRACK = 0bx)

VBAT

LIM_THRES

LIMITER THRESHOLD FIXED AT SET VALUE

AND DOES NOT TRACK VBAT

Figure 71. Limiter Fixed (LIM_EN = 0b01, VBAT_TRACK = 0b0)

Table 18. Limiter Modes

LIM_EN

VBAT_TRACK

Limiter

VBAT < VBAT_INF

VBAT > VBAT_INF

Comments

0 or 1

Not applicable

See Figure 70

Fixed

Use the set threshold

See Figure 71

Variable

Lowers the threshold

Use the set threshold

See Figure 72 and Figure 73

0 or 1

Fixed

Mutes the output

Use the set threshold

Not applicable

Fixed

Use the set threshold

No limiting

See Figure 74 and Figure 75

Variable

Lowers the threshold

No limiting

See Figure 76 and Figure 77

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