SSM3525 datasheet(2/60 Pages) AD

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SSM3525

Data Sheet

Rev. A | Page 2 of 60

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description......................................................................... 1

Revision History ............................................................................... 3

Functional Block Diagram .............................................................. 4

Specifications..................................................................................... 5

Timing Specifications .................................................................. 7

Absolute Maximum Ratings.......................................................... 10

Thermal Resistance .................................................................... 10

ESD Caution................................................................................ 10

Pin Configuration and Function Descriptions........................... 11

Theory of Operation ...................................................................... 23

Overview...................................................................................... 23

Power Supplies ............................................................................ 23

Pin Setup and Control ............................................................... 23

Power-Down Modes .................................................................. 24

Output Current Sensing ............................................................ 24

Output Voltage Sensing ............................................................. 24

Temperature Sensor ................................................................... 24

PCM Digital Audio Serial Interface......................................... 24

Stereo (I2S/Left Justified) Operating Mode............................. 24

TDM Operating Mode............................................................... 25

Serial Data Placement................................................................ 25

PDM Operating Mode............................................................... 26

Analog and Digital Gain............................................................ 27

PVDD (VBAT) Sensing............................................................. 27

Faults and Limiter Status Reporting ........................................ 27

Limiter and Battery Tracking Threshold Control.................. 27

Pop and Click Suppression........................................................ 30

High Frequency Clipper ............................................................ 30

EMI Noise.................................................................................... 30

Output Modulation Description .............................................. 30

Bootstrap Capacitors.................................................................. 32

Power Supply Decoupling ......................................................... 32

Output EMI Filtering................................................................. 32

PCB Component Placement ..................................................... 32

Layout........................................................................................... 33

I2C Control .................................................................................. 33

Applications Information .............................................................. 35

SSM3525 I2C Mode Register Map (SSM3525_I2C_Regmap)

SSM3525 I2C Mode Register Map (SSM3525_I2C_REGMAP)

ADI Vendor ID Register............................................................ 37

Device ID 1 Register .................................................................. 37

Revision ID Register .................................................................. 37

Regulator Enable and IOVDD Selection Register ................. 38

Amplifier Gain, Edge Control, and Sense Sample Rate

DAC Control Register................................................................ 39

DAC Volume Control Register................................................. 40

Audio Limiter Control 1 Register ............................................ 41

Audio Limiter Control 2 Register ............................................ 42

Audio Limiter Control 3 Register ............................................ 43

VBAT Limiter Control 1 Register ............................................ 43

VBAT Limiter Control 2 Register ............................................ 44

VBAT Limiter Control 3 Register ............................................ 44

Limiter Link Control Register .................................................. 45

DAC Clip Point Control Register............................................. 45

Fault Control Register................................................................ 46

Chip Status Register ................................................................... 47

Temperature Sensor Value Register ......................................... 47

VBAT/PVDD ADC Value Register.......................................... 48

Master and Block Power Control Register.............................. 48

PDM Control Register............................................................... 49

Serial Interface Control 1 Register........................................... 49

Serial Interface Control 2 Register........................................... 50

Serial Interface Placement Control 1 Register........................ 51

Serial Interface Placement Control 2 Register........................ 52

Serial Interface Placement Control 3 Register........................ 52

Serial Interface Placement Control 4 Register........................ 53

Serial Interface Placement Control 5 Register........................ 54

Serial Interface Placement Control 6 Register........................ 54

AGC_GAIN1 Input Data Placement Register........................ 55

AGC_GAIN2 Input Data Placement Register........................ 56

AGC_GAIN3 Input Data Placement Register........................ 57

AGC_GAIN4 Input Data Placement Register........................ 58

Software Reset Register ............................................................. 59

Ordering Guide .......................................................................... 60

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