Data Sheet

SSM3525

Rev. A |Page 11 of 60

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

1

2

3

4

A

B

C

D

OUT–

OUT+

PGND

BST–

BALL A1

INDICATOR

OUT–

OUT+

PGND

VREG/

AVDD

AGND

ADDR

IOVDD

SCL

SDA

SDATAI

SDATAO

5

BST+

PGND

PGND

FSYNC

BCLK

E

PVDD/VBAT

PVDD/VBAT

PVDD/VBAT

Figure 5. Ball Configuration (Top Side View)

Table 10. Pin Function Descriptions

Pin No.

Mnemonic

Description

A1

BST−

AIN

Bootstrap Capacitor, Inverting Output.

A2

OUT−

AOUT

Inverting Output.

A3, B3, C3

PVDD/VBAT

PWR

Power Stage Supply/Battery Supply.

A4

OUT+

AOUT

Noninverting Output.

A5

BST+

AIN

Bootstrap Capacitor, Noninverting Output.

B1, B5, C1, C5

PGND

PWR

Power Stage Ground.

B2

OUT−

AOUT

Inverting Output.

B4

OUT+

AOUT

Noninverting Output.

D1

VREG/AVDD

AIO

Analog Input/Output. 5 V regulator output/AVDD input.

D2

AGND

PWR

Analog Ground.

D3

ADDR

DIN

Address Selection.

D4

IOVDD

PWR

Input/Output and Digital Supply.

D5

FSYNC

DIN

Frame Sync Input.

E1

SCL

DIN

E2

SDA

DIO

E3

SDATAI

DIN

E4

SDATAO

DOUT

E5

BCLK

DIN

1

AOUT is analog output, PWR is power supply or ground pin, AIN is analog input, DIN is digital input, DOUT is digital output, and DIO is digital input/output.