AD9510 datasheet(1/56 Pages) AD

Part #	AD9510

Description	1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs

PDF	56 Pages

Scroll/Zoom	100%

Manufacturer	AD [Analog Devices]

Direct Link	http://www.analog.com

Logo

1 / 56 page

1.2 GHz Clock Distribution IC, PLL Core,

Dividers, Delay Adjust, Eight Outputs

Data Sheet

AD9510

Rev. C

Document Feedback

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother

rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Technical Support

www.analog.com

FEATURES

Low phase noise phase-locked loop core

Reference input frequencies to 250 MHz

Programmable dual modulus prescaler

Programmable charge pump (CP) current

Separate CP supply (VCPS) extends tuning range

Two 1.6 GHz, differential clock inputs

8 programmable dividers, 1 to 32, all integers

Phase select for output-to-output coarse delay adjust

4 independent 1.2 GHz LVPECL outputs

Additive output jitter of 225 fs rms

4 independent 800 MHz low voltage differential signaling

(LVDS) or 250 MHz complementary metal oxide conductor

(CMOS) clock outputs

Additive output jitter of 275 fs rms

Fine delay adjust on 2 LVDS/CMOS outputs

Serial control port

Space-saving 64-lead LFCSP

APPLICATIONS

Low jitter, low phase noise clock distribution

Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, and

mixed-signal front ends (MxFEs)

High performance wireless transceivers

High performance instrumentation

Broadband infrastructure

FUNCTIONAL BLOCK DIAGRAM

Figure 1.

GENERAL DESCRIPTION

The AD9510 provides a multi-output clock distribution function

along with an on-chip phase-locked loop (PLL) core. The design

emphasizes low jitter and phase noise to maximize data converter

performance. Other applications with demanding phase noise

and jitter requirements also benefit from this device.

The PLL section consists of a programmable reference divider

(R); a low noise, phase frequency detector (PFD); a precision

charge pump (CP); and a programmable feedback divider (N).

By connecting an external voltage-controlled crystal oscillator

(VCXO) or voltage-controlled oscillator (VCO) to the CLK2

and CLK2B pins, frequencies of up to 1.6 GHz can be synchronized

to the input reference.

There are eight independent clock outputs. Four outputs are low

voltage positive emitter-coupled logic (LVPECL) at 1.2 GHz,

and four are selectable as either LVDS (800 MHz) or CMOS

(250 MHz) levels.

Each output has a programmable divider that can be bypassed

or set to divide by any integer up to 32. The phase of one clock

output relative to another clock output can be varied by means

of a divider phase select function that serves as a coarse timing

adjustment. Two of the LVDS/CMOS outputs feature program-

mable delay elements with full-scale ranges up to 8 ns of delay.

This fine tuning delay block has 5-bit resolution, giving 25

possible delays from which to choose for each full-scale setting

(Register 0x36 and Register 0x3A = 00000b to 11000b).

The AD9510 is ideally suited for data converter clocking

applications where maximum converter performance is

achieved by encode signals with subpicosecond jitter.

The AD9510 is available in a 64-lead LFCSP and can be operated

from a single 3.3 V supply. An external VCO, which requires an

extended voltage range, can be accommodated by connecting

the charge pump supply (VCP) to 5.5 V. The temperature range

is −40°C to +85°C.

R DIVIDER

N DIVIDER

PHASE

FREQUENCY

DETECTOR

CHARGE

PUMP

PLL

SETTINGS

CLK2

STATUS

CLK2B

PROGRAMMABLE

DIVIDERS AND

PHASE ADJUST

OUT7

OUT7B

LVDS/CMOS

/1, /2, /3... /31, /32

OUT6

OUT6B

LVDS/CMOS

/1, /2, /3... /31, /32

OUT0

OUT0B

LVPECL

/1, /2, /3... /31, /32

OUT1

OUT1B

LVPECL

/1, /2, /3... /31, /32

OUT2

OUT2B

LVPECL

/1, /2, /3... /31, /32

OUT3

OUT3B

LVPECL

/1, /2, /3... /31, /32

OUT4

OUT4B

LVDS/CMOS

/1, /2, /3... /31, /32

OUT5

OUT5B

LVDS/CMOS

/1, /2, /3... /31, /32

∆T

CLK1

CLK1B

REFIN

REFINB

FUNCTION

SCLK

SDIO

SDO

CSB

SERIAL

CONTROL

PORT

CP

CPRSET

DISTRIBUTION

REF

SYNCB,

RESETB

PDB

RSET

AD9510

GND

VS

VCP

PLL

REF

Similar Part No. - AD9510

Manufacturer	Part #	Datasheet	Description
Analog Devices	AD9510	597Kb / 60P	1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs 5/05-Rev. 0 to Rev. A
	AD9510-VCO/PCB	597Kb / 60P	1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs 5/05-Rev. 0 to Rev. A
	AD9510/PCB	597Kb / 60P	1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs 5/05-Rev. 0 to Rev. A
	AD9510BCPZ	597Kb / 60P	1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs 5/05-Rev. 0 to Rev. A
	AD9510BCPZ-REEL7	597Kb / 60P	1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs 5/05-Rev. 0 to Rev. A

More results

Similar Description - AD9510

Manufacturer	Part #	Datasheet	Description
Analog Devices	AD9511	1Mb / 60P	1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs 6/05-Rev. 0 to Rev. A
	AD9510	597Kb / 60P	1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs 5/05-Rev. 0 to Rev. A
	AD9514	633Kb / 28P	1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs 7/05-Revision 0
	AD9515	656Kb / 28P	1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Two Outputs 7/05-Revision 0
	AD9512BCPZ	967Kb / 48P	1.2 GHz Clock Distribution IC, 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs REV. A
	AD9510	886Kb / 56P	1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs REV. B
	AD9511	1Mb / 60P	1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs REV. A
	AD9514	634Kb / 28P	1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs REV. 0
	AD9515	469Kb / 28P	1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Two Outputs REV. A
	AD9515	407Kb / 28P	1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Two Outputs Rev. B

More results

AD9510 Datasheet(PDF) 1 Page - Analog Devices

AD9510 Datasheet(HTML) 1 Page - Analog Devices

Similar Part No. - AD9510

Similar Description - AD9510

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

Datasheet Download

Link URL