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AD9547 Datasheet(PDF) 69 Page - Analog Devices |
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AD9547 Datasheet(HTML) 69 Page - Analog Devices |
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69 / 106 page  Data Sheet AD9547 Addr Opt1 Name D7 D6 D5 D4 D3 D2 D1 D0 Def EEPROM storage sequence 0x0E10 L, E SYSCLK settings Data: 9 bytes 0x08 0x0E11 L, E Address: 0x0100 0x01 0x0E12 L, E 0x00 0x0E13 L, E I/O update Action: I/O update 0x80 0x0E14 L, E SYSCLK calibration Action: calibrate system clock 0xA0 0x0E15 L, E General configuration settings Data: 21 bytes 0x14 0x0E16 L, E Address: 0x0200 0x02 0x0E17 L, E 0x00 0x0E18 L, E DPLL settings Data: 28 bytes 0x1B 0x0E19 L, E Address: 0x0300 0x03 0x0E1A L, E 0x00 0x0E1B L, E Clock distribution settings Data: 26 bytes 0x19 0x0E1C L, E Address: 0x0400 0x04 0x0E1D L, E 0x00 0x0E1E L, E I/O update Action: I/O update 0x80 0x0E1F L, E Reference input settings Data: 8 bytes 0x07 0x0E20 L, E Address: 0x0500 0x05 0x0E21 L, E 0x00 0x0E22 L, E Profile 0 and Profile 1 settings Data: 100 bytes 0x63 0x0E23 L, E Address: 0x0600 0x06 0x0E24 L, E 0x00 0x0E25 L, E Profile2 and Profile 3 settings Data: 100 bytes 0x63 0x0E26 L, E Address: 0x0680 0x06 0x0E27 L, E 0x80 0x0E28 L, E Profile 4 and Profile 5 settings Data: 100 bytes 0x63 0x0E29 L, E Address: 0x0700 0x07 0x0E2A L, E 0x00 0x0E2B L, E Profile 6 and Profile 7 settings Data: 100 bytes 0x63 0x0E2C L, E Address: 0x0780 0x07 0x0E2D L, E 0x80 0x0E2E L, E I/O update Action: I/O update 0x80 0x0E2F L, E Operational control settings Data: 17 bytes 0x10 0x0E30 L, E Address: 0x0A00 0x0A 0x0E31 L, E 0x00 0x0E32 L, E I/O update Action: I/O update 0x80 0x0E33 L, E End of data Action: end of data 0xFF 0x0E34 to 0x0E3F L, E Continuation of scratch pad area 1 For details regarding the options in the Opt column, see the I/O Programming Registers section. Rev. G | Page 69 of 106 |
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