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AD9547 Datasheet(PDF) 15 Page - Analog Devices |
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AD9547 Datasheet(HTML) 15 Page - Analog Devices |
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15 / 106 page  Data Sheet AD9547 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS PIN 1 INDICATOR 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 DVDD SCLK/SCL SDIO SDO CS/SDA DVDD DVDD3 DVDD RESET DVDD DVDD VSS DACOUTP DACOUTN VSS AVDD3 NOTES 1. NC = NO CONNECT. 2. THE EXPOSED PAD MUST BE CONNECTED TO GROUND (VSS). REFBB REFB AVDD REFAA REFA AVDD3 AVDD TDC_VRT TDC_VRB AVDD SYSCLKP SYSCLKN AVDD SYSCLK_LF SYSCLK_VREG AVDD3 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 AD9547 TOP VIEW (Not to Scale) Figure 2. Pin Configuration Table 21. Pin Function Descriptions Pin No. Input/ Output Pin Type Mnemonic Description 1, 6, 8, 53, 59, 64 I Power DVDD 1.8 V Digital Supply. 2 I 3.3 V CMOS SCLK/SCL Serial Programming Clock. Data clock for serial programming. SCLK is used for SPI mode, and SCL is used for I2C mode. 3 I/O 3.3 V CMOS SDIO Serial Data Input/Output. When the device is in 4-wire mode, data is written via this pin. In 3-wire mode, both data reads and writes occur on this pin. There is no internal pull-up/pull-down resistor on this pin. 4 O 3.3 V CMOS SDO Serial Data Output. Use this pin to read data in 4-wire mode (high impedance in 3-wire mode). There is no internal pull-up/pull-down resistor on this pin. 5 I 3.3 V CMOS CS/SDA SPI Mode. Chip Select (CS) Input. Active low. When programming a device, this pin must be held low. In systems where more than one AD9547 is present, this pin enables individual programming of each AD9547. In SPI mode, this pin has an internal 30 kΩ pull-up resistor. I2C Mode. Serial Data Line (SDA) Input/Output. In I2C Mode, this pin is an output during read operations and an input during write operations. There is no internal pull-up resistor in I2C mode. 7, 58 I Power DVDD3 3.3 V I/O Digital Supply. 9 I 3.3 V CMOS RESET Chip Reset. Assertion of this pin (active high) resets the device. This pin has an internal 50 kΩ pull-down resistor. 10, 11 I Power DVDD 1.8 V DAC Decode Digital Supply. Group these pins together. 12, 15, 19, 22 O Ground VSS Analog Ground. Connect to ground. 13 O Differential output DACOUTP DAC Output. DACOUTP contains an internal 50 Ω pull-down resistor. 14 O Differential output DACOUTN Complementary DAC Output. DACOUTN contains an internal 50 Ω pull-down resistor. 16 I Power AVDD3 3.3 V Analog (DAC) Power Supply. 17, 18 I Power AVDD 1.8 V Analog (DAC) Power Supply. 20 I Differential input CLKINN Clock Distribution Input. In standard operating mode, this pin is connected to the filtered DACOUTN output. This internally biased input is typically ac-coupled, and, when configured as such, can accept any differential signal with a single- ended swing of at least 400 mV. Rev. G | Page 15 of 106 |
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