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AD9547

Data Sheet

REFERENCE SWITCHOVER

An attractive feature of the AD9547 is its versatile reference

switchover capability. The flexibility of the reference switchover

functionality resides in a sophisticated prioritization algorithm

coupled with register-based controls. This scheme provides the

user with maximum control over the state machine that handles

reference switchover.

The main reference switchover control resides in the loop mode

allow the user to select one of the reference switchover state

machine’s four operating modes, as follows:

•

Automatic mode (Address 0x0A01, Bits[4:3] = 00)

•

Fallback mode (Address 0x0A01, Bits[4:3] = 01)

•

Holdover mode (Address 0x0A01, Bits[4:3] = 10)

•

Manual mode (Address 0x0A01, Bits[4:3] = 11)

In automatic mode, a fully automatic, priority-based algorithm

selects the active reference. When programmed for automatic

mode, the device ignores the user reference selection bits (Register

0x0A01, Bits[1:0]). However, when programmed for any of the

other three modes, the device uses the user reference bits. They

specify a particular input reference (00 = REF A, 01 = REF AA,

10 = REF B, 11 = REF BB).

In fallback mode, the user reference is the active reference when

it is valid. Otherwise, the device switches to a new reference using

the automatic priority-based algorithm.

In holdover mode, the user reference is the active reference when

it is valid. Otherwise, the device switches to holdover mode.

In manual mode, the user reference is the active reference whether

it is valid or not. Note that, when using this mode, the user must

program the reference-to-profile assignment (see Register 0x0503

and Register 0x0504) as manual for the particular reference that

is declared as the user reference. The reason is that if the user refer-

ence fails and its redetect timer expires, its profile assignment

(shown in Table 22) becomes null. This means that the active

reference (user reference) does not have an assigned profile, which

places the AD9547 into an undefined state.

The user also has the option to force the device directly into

holdover or free-run operation via the user holdover and user

free-run bits (Register 0x0A01, Bits[6:5]). In free-run mode, the

free-running frequency tuning word register (Address 0x0300

to Address 0x0305) defines the DDS output frequency.

In holdover mode, the DDS output frequency depends on the

holdover control settings (see the Holdover section).

Automatic Priority-Based Reference Switchover

The AD9547 has a two-tiered, automatic, priority-based algorithm

that is in effect for both automatic and fallback reference switch-

over. The algorithm relies on the fact that each reference profile

contains both a selection priority and a promoted priority. The

selection and promoted priority values range from 0 (highest

priority) to 7 (lowest priority). The selection priority determines

the order in which references are chosen as the active reference.

The promoted priority is a separate priority value given to a

reference only after it becomes the active reference.

An automatic reference switchover occurs on failure of the active

reference or when a previously failed reference becomes valid

and its selection priority is higher than the promoted priority

of the currently active reference (assuming that the automatic or

fallback reference switchover is in effect). When performing an

automatic reference switchover, the AD9547 chooses a reference

based on the priority settings within the profiles. That is, the device

switches to the reference with the highest selection priority (lowest

numeric priority value). It does so by using the reference-to-profile

table (see Table 22) to determine the reference associated with

the profile exhibiting the highest priority.

If multiple references share the same profile, the device chooses

the reference having the lowest index value. For example, if the

A, B, and BB references (Index 0, Index 2, and Index 3, respectively)

share the same profile, a switchover to Reference A occurs because

Reference A has the lowest index value. Note, however, that only

valid references are included in switchover of the selection process.

The switchover control logic ignores any reference with a status

indication of invalid.

When using multiple differential reference inputs, physically

connect the reference input signal with the highest priority to

the reference input with the lowest index value. For example, a

differential signal on Reference Input B should not have a

priority that exceeds a differential signal on Reference Input A.

A differential reference on Reference Input A has no priority

restrictions. Table 23 shows four valid priority settings for two

differential reference inputs.

Table 23. Valid Differential Reference Priority Examples1

Reference Input A

Reference Input B

Any reference input configured for a CMOS input is exempt from these

considerations.

Rev. G | Page 30 of 106

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