D17133CS datasheet(178/289 Pages) NEC

178 / 289 page

CHAPTER 15

STANDBY FUNCTIONS

163

15.2 HALT MODE

15.2.1 HALT Mode Setting

The system is placed in HALT mode by executing the HALT instruction. The HALT instruction's operands b3b2b1b0

are the conditions for canceling HALT mode.

Table 15-2. HALT Mode Cancellation Condition

Format: HALT b3b2b1b0B

Bit

Condition for Canceling HALT ModeNote 1

At 1, cancellation by IRQ

××× is enabled.Notes 2, 4

"Fixed to 0"

At 1, forced cancellation by IRQTM is enabled.Note 3, 4

"Fixed to 0"

Notes

1. At HALT 0000B, only the resets (RESET input; power-ON/power-DOWN reset) are valid.

2. It is required that IP

×××=1.

3. Regardless of the PITM's state, HALT mode is canceled.

4. Even if the HALT instruction is executed when IRQ

×××=1, the HALT instruction is ignored (handled

as the NOP instruction) thus failing to place the system in HALT mode.

15.2.2 Start Address after HALT Mode is Canceled

The start address varies depending on the cancellation condition and the interrupt enable condition.

Table 15-3. Start Address After HALT Mode Cancellation

Cancellation Condition Start Address After Cancellation

ResetNote 1

Address 0

IRQ

××Note 2

If DI, the start address is the one following the HALT instruction

If EI, the start address is the interrupt vector.

(If more than one IRQ

××× have been set, the start address is the interrupt

vector with a higher priority.)

Notes

1. Valid resets include the RESET input and power-ON/power-DOWN resets.

2. Except for forced cancellation by IRQTM, it is required that IP

×××=1.

D17133CS Datasheet(PDF) 178 Page - NEC