D17133CS datasheet(180/289 Pages) NEC

180 / 289 page

CHAPTER 15

STANDBY FUNCTIONS

165

15.2.3 HALT Setting Condition

(1)

Forced cancellation by IRQTM

• The timer is in the operable state (TMEN=1)

• The timer's interrupt request flag is cleared (IRQTM=0).

(2)

Cancellation by the interrupt request flag (IRQ

×××)

• Setting in a way that places beforehand the peripheral hardware used for HALT cancellation in an operable

state.

Timer

Operable state (TMEN=1)

Serial Interface

Serial interface circuit placed in operable state (SIOTS=1, SIOEN=1)

INT Pin

Setting the edge selection

• The interrupt request flag (IRQ

×××) of the peripheral hardware used for HALT cancellation is cleared (to

0).

• The interrupt enable flag (IP

×××) of the peripheral hardware used for HALT cancellation is set (to 1).

Caution Be sure to code a NOP instruction immediately before the HALT instruction. The time of one

instruction is generated between the IRQ

××× operation instruction and the HALT instruction by

coding the NOP instruction immediately before the HALT instruction. Therefore, in the case of

the CLR1 IRQ

××× instruction, for example, the clearance of the IRQ××× is correctly reflected in

the HALT instruction (Example 1). If a NOP instruction is not coded immediately before the HALT

instruction, the CLR1 IRQ

××× instruction is not reflected in the HALT instruction thus failing to

place the system in HALT mode (Example 2).

D17133CS Datasheet(PDF) 180 Page - NEC