D17133CS datasheet(201/289 Pages) NEC

201 / 289 page

CHAPTER 18

INSTRUCTION SET

186

18.2 LEGEND

Address register

ASR

Address stack register indicated by stack pointer

addr

Program memory address (11 bits, the most-significant bit is fixed to 0)

BANK

Bank register

CMP

Compare flag

Carry flag

DBF

Data buffer

Halt release condition

INTEF

Interrupt enable flag

INTR

INTSK

Interrupt stack register

Index register

Data memory row address pointer

MPE

Memory pointer enable flag

Data memory address indicated by mR and mC

Data memory row address (upper)

Data memory column address (lower)

Bit position (4 bits)

Immediate data (4 bits)

Program counter

Peripheral address

Peripheral address (upper 3 bits)

Peripheral address (lower 4 bits)

General register column address

rfR

rfC

Stack pointer

Stop release condition

Window register

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