| Electronic Components Datasheet Search |
|
D17133CS Datasheet(PDF) 120 Page - NEC |
|
|
|||||||||||||||||||||||||||||
D17133CS Datasheet(HTML) 120 Page - NEC |
|
120 / 289 page ![]() CHAPTER 12 PORTS 12.1 PORT 0A (P0A0, P0A1, P0A2, P0A3) Port 0A is a 4-bit input/output port with an output latch. It is mapped into address 70H of BANK0 in data memory. The output format is CMOS push-pull output. Input or output can be specified in each bit. Input/output is specified by P0ABIO0 to P0ABIO3 (address 35H) in the register file. When P0ABIOn is 0 (n=0 to 3), each pin of port 0A is used as input port. If a read instruction is executed for the port register, pin statuses are read. When P0ABIOn is 1 (n=0 to 3), each pin of port 0A is used as output port and the contents written in the output latch are output to pins. If a read instruction is executed when pins are output ports, the contents of the output latch, rather than pin statuses, are fetched. At reset, P0ABIOn is set to 0 and all P0A pins become input ports. The contents of the port output latch are 0. Table 12-1. Writing into and Reading from the Port Register (0.70H) BANK0 70H Write Read 0 Input P0A pin status 1 Output P0A latch contents P0ABIOn RF: 35H Pin Input/Output Possible Write to the P0A latch 105 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |