D17133CS datasheet(122/289 Pages) NEC

122 / 289 page

CHAPTER 12

PORTS

107

12.3 PORT 0C (P0C0, P0C1, P0C2, P0C3) ... in the case of the

µPD17120 and 17121

Port 0C is a 4-bit input/output port with an output latch. It is mapped into address 72H of BANK0 in data memory.

The output format is CMOS push-pull output.

Input or output can be specified bit-by-bit. Input/output can be specified by P0CBIO0 to P0CBIO3 (address 34H)

in the register file.

If P0CBIOn is 0 (n=0 to 3), the P0Cn pins are used as input port. If a data read instruction is executed for the

port register, the pin statuses are read. If P0CBIOn is 1 (n=0 to 3), the P0Cn pins are used as output port and the

contents written in the output latch are output to pins. If a read instruction is executed when pins are used as output

ports, the contents of the latch, rather than pin statuses, are fetched.

At reset, P0CBIO0 to P0CBIO3 are 0 and all P0C pins are input ports. The contents of the port output latch are

Table 12-3. Writing/reading to/from Port Register (0.72H) (

µPD17120, 17121)

(n=0 to 3)

BANK0 72H

Write

Read

Input

Status of P0C pin

Output

Contents of P0C latch

P0CBIOn

RF: 34H

Pin Input/Output

Possible

Write to the P0C

latch

D17133CS Datasheet(PDF) 122 Page - NEC